| Commit message (Collapse) | Author | Age | Files | Lines | ||
|---|---|---|---|---|---|---|
| ... | ||||||
| * | Add AVX2 VEXTRACTI128 and VINSERTI128 instructions. Fix VPERM2I128 to be ↵ | Craig Topper | 2011-11-07 | 1 | -2/+38 | |
| | | | | | | | qualified with HasAVX2 instead of HasAVX. Mark VINSERTF128 and VEXTRACTF128 as never having side effects. llvm-svn: 143902 | |||||
| * | More AVX2 instructions and their intrinsics. | Craig Topper | 2011-11-06 | 4 | -14/+80 | |
| | | | | | llvm-svn: 143895 | |||||
| * | Replace (Lower|Upper)caseString in favor of StringRef's newest methods. | Benjamin Kramer | 2011-11-06 | 9 | -41/+20 | |
| | | | | | llvm-svn: 143891 | |||||
| * | Add more AVX2 instructions and intrinsics. | Craig Topper | 2011-11-06 | 2 | -13/+96 | |
| | | | | | llvm-svn: 143861 | |||||
| * | Add support for passing i1, i8, and i16 call parameters. Also, be sure to | Chad Rosier | 2011-11-05 | 1 | -28/+16 | |
| | | | | | | | | zero-extend the constant integer encoding. Test case provides testing for both call parameters and materialization of i1, i8, and i16 types. llvm-svn: 143821 | |||||
| * | Add more PRI.64 macros for MSVC and use them throughout the codebase. | Benjamin Kramer | 2011-11-05 | 1 | -1/+1 | |
| | | | | | llvm-svn: 143799 | |||||
| * | Allow i1 to be promoted to i32 for ARM APCS calling convention. | Chad Rosier | 2011-11-05 | 1 | -1/+1 | |
| | | | | | llvm-svn: 143755 | |||||
| * | Enhanced vzeroupper insertion pass that avoids inserting vzeroupper where it ↵ | Eli Friedman | 2011-11-04 | 1 | -27/+207 | |
| | | | | | | | | | is unnecessary through local analysis. Patch from Bruno Cardoso Lopes, with some additional changes. I'm going to wait for any review comments and perform some additional testing before turning this on by default. llvm-svn: 143750 | |||||
| * | Cannot create a result register for non-legal types. | Chad Rosier | 2011-11-04 | 1 | -1/+2 | |
| | | | | | llvm-svn: 143749 | |||||
| * | When materializing an i32, SExt vs ZExt doesn't matter when we're trying to fit | Chad Rosier | 2011-11-04 | 1 | -1/+1 | |
| | | | | | | | | | in a 16-bit immediate. However, for the shorter non-legal types (i.e., i1, i8, i16) we should not sign-extend. This prevents us from materializing things such as 'true' (i.e., i1 1). llvm-svn: 143743 | |||||
| * | Enable support for materializing i1, i8, and i16 integers via move immediate. | Chad Rosier | 2011-11-04 | 1 | -6/+11 | |
| | | | | | llvm-svn: 143739 | |||||
| * | build/cmake: Coalesce the configuration time header include fragment generation | Daniel Dunbar | 2011-11-04 | 1 | -36/+1 | |
| | | | | | | | for target definitions. llvm-svn: 143731 | |||||
| * | build/cmake: Use tblgen macro directly instead of llvm_tablegen, which just | Daniel Dunbar | 2011-11-04 | 10 | -79/+79 | |
| | | | | | | | added a layer of indirection with no value (not even conciseness). llvm-svn: 143727 | |||||
| * | Add missing argument for atomic instructions in c++ backend. PR11268, part 2. | Eli Friedman | 2011-11-04 | 1 | -3/+3 | |
| | | | | | llvm-svn: 143712 | |||||
| * | Add intrinsics for X86 vcvtps2ph and vcvtph2ps instructions | Craig Topper | 2011-11-04 | 1 | -24/+29 | |
| | | | | | llvm-svn: 143683 | |||||
| * | Fix some minor scheduling itinerary bug. It's not expected to actually ↵ | Evan Cheng | 2011-11-04 | 1 | -14/+20 | |
| | | | | | | | affect codegen. llvm-svn: 143675 | |||||
| * | Indentation. | Chad Rosier | 2011-11-04 | 1 | -1/+1 | |
| | | | | | llvm-svn: 143670 | |||||
| * | Add fast-isel support for returning i1, i8, and i16. | Chad Rosier | 2011-11-04 | 1 | -6/+19 | |
| | | | | | llvm-svn: 143669 | |||||
| * | Reapply r143206, with fixes. Disallow physical register lifetimes | Dan Gohman | 2011-11-03 | 4 | -14/+212 | |
| | | | | | | | | across calls, and only check for nested dependences on the special call-sequence-resource register. llvm-svn: 143660 | |||||
| * | fixed global array handling for ptx to use the correct bit widths | Dan Bailey | 2011-11-03 | 1 | -12/+17 | |
| | | | | | llvm-svn: 143640 | |||||
| * | build: Add initial cut at LLVMBuild.txt files. | Daniel Dunbar | 2011-11-03 | 49 | -0/+1266 | |
| | | | | | llvm-svn: 143634 | |||||
| * | Add new X86 AVX2 VBROADCAST instructions. | Craig Topper | 2011-11-03 | 1 | -13/+26 | |
| | | | | | llvm-svn: 143612 | |||||
| * | Add support for sign-extending non-legal types in SelectSIToFP(). | Chad Rosier | 2011-11-03 | 1 | -5/+14 | |
| | | | | | llvm-svn: 143603 | |||||
| * | Fixed parameter name. | Lang Hames | 2011-11-02 | 2 | -3/+3 | |
| | | | | | llvm-svn: 143594 | |||||
| * | Try to lower memset/memcpy/memmove to vector instructions on ARM where the ↵ | Lang Hames | 2011-11-02 | 2 | -1/+34 | |
| | | | | | | | alignment permits. llvm-svn: 143582 | |||||
| * | Add support for comparing integer non-legal types. | Chad Rosier | 2011-11-02 | 1 | -16/+33 | |
| | | | | | llvm-svn: 143559 | |||||
| * | Fix the issue that r143552 was trying to address the _right_ way. ↵ | Owen Anderson | 2011-11-02 | 1 | -2/+6 | |
| | | | | | | | One-register lists are legal on LDM/STM instructions, but we should not print the PUSH/POP aliases when they appear. This fixes round tripping on this instruction. llvm-svn: 143557 | |||||
| * | The rules disallowing single-register reglist operands only apply to the POP ↵ | Owen Anderson | 2011-11-02 | 1 | -5/+1 | |
| | | | | | | | alias, not to LDM/STM instructions. Revert r143552. llvm-svn: 143553 | |||||
| * | Register list operands are not allowed to contain only a single register. ↵ | Owen Anderson | 2011-11-02 | 1 | -1/+5 | |
| | | | | | | | Alternate encodings are used in that case. llvm-svn: 143552 | |||||
| * | Factor out an EmitIntExt function. No functionality change intended. | Chad Rosier | 2011-11-02 | 1 | -31/+37 | |
| | | | | | llvm-svn: 143547 | |||||
| * | More AVX2 instructions and intrinsics. | Craig Topper | 2011-11-02 | 1 | -3/+108 | |
| | | | | | llvm-svn: 143536 | |||||
| * | Add a bunch more X86 AVX2 instructions and their corresponding intrinsics. | Craig Topper | 2011-11-02 | 2 | -2/+256 | |
| | | | | | llvm-svn: 143529 | |||||
| * | Factor out a SelectTrunc function. No functionality change intended. | Chad Rosier | 2011-11-02 | 1 | -17/+28 | |
| | | | | | llvm-svn: 143523 | |||||
| * | ARM label operands can be quoted. | Jim Grosbach | 2011-11-01 | 1 | -0/+1 | |
| | | | | | | | For example, labels from Objective-C sources. llvm-svn: 143511 | |||||
| * | ARM label operands can have an optional '#' before them. | Jim Grosbach | 2011-11-01 | 1 | -6/+4 | |
| | | | | | llvm-svn: 143510 | |||||
| * | Fix disassembly of some VST1 instructions. | Owen Anderson | 2011-11-01 | 1 | -5/+19 | |
| | | | | | llvm-svn: 143507 | |||||
| * | rename getHostTriple into getDefaultTargetTriple | Sebastian Pop | 2011-11-01 | 1 | -2/+2 | |
| | | | | | llvm-svn: 143502 | |||||
| * | Teach the x86 backend a couple tricks for dealing with v16i8 sra by a ↵ | Eli Friedman | 2011-11-01 | 1 | -0/+18 | |
| | | | | | | | constant splat value. Fixes PR11289. llvm-svn: 143498 | |||||
| * | Don't fold negative offsets into cp / dp accesses to avoid relocation errors. | Richard Osborne | 2011-11-01 | 1 | -2/+2 | |
| | | | | | | | This can happen if the address + addend is less than the start of the cp / dp. llvm-svn: 143459 | |||||
| * | ARM VLD/VST assembly parsing for symbolic address operands. | Jim Grosbach | 2011-11-01 | 3 | -2/+36 | |
| | | | | | llvm-svn: 143413 | |||||
| * | Add support for new atomics to cpp backend. Misc other fixes while I'm ↵ | Eli Friedman | 2011-10-31 | 1 | -2/+97 | |
| | | | | | | | here. PR11268. llvm-svn: 143406 | |||||
| * | ARM VST1 w/ writeback assembly parsing and encoding. | Jim Grosbach | 2011-10-31 | 5 | -59/+168 | |
| | | | | | llvm-svn: 143369 | |||||
| * | ARM writeback vs. stride operands for VST/VLD. | Jim Grosbach | 2011-10-31 | 1 | -239/+240 | |
| | | | | | | | | The _fixed variants have a writeback operand, but not a stride operand. Split the conditional flag to distinguish the cases. llvm-svn: 143356 | |||||
| * | More not-crashing NEON disassembly updates for the vld refactoring. | Owen Anderson | 2011-10-31 | 1 | -0/+4 | |
| | | | | | llvm-svn: 143351 | |||||
| * | Begin adding AVX2 instructions. No selection support yet other than intrinsics. | Craig Topper | 2011-10-31 | 1 | -146/+371 | |
| | | | | | llvm-svn: 143331 | |||||
| * | Switch new .file directive emission off by default, change llc's flag for it to | Nick Lewycky | 2011-10-31 | 1 | -1/+1 | |
| | | | | | | | -enable-dwarf-directory. llvm-svn: 143326 | |||||
| * | Add intrinsics and feature flag for read/write FS/GS base instructions. Also ↵ | Craig Topper | 2011-10-30 | 5 | -19/+53 | |
| | | | | | | | add AVX2 feature flag. llvm-svn: 143319 | |||||
| * | X86: Emit logical shift by constant splat of <16 x i8> as a <8 x i16> shift ↵ | Benjamin Kramer | 2011-10-30 | 1 | -0/+26 | |
| | | | | | | | and zero out the bits where zeros should've been shifted in. llvm-svn: 143315 | |||||
| * | Fix pr11266. | Nadav Rotem | 2011-10-30 | 1 | -4/+22 | |
| | | | | | | | | | | On x86: (shl V, 1) -> add V,V Hardware support for vector-shift is sparse and in many cases we scalarize the result. Additionally, on sandybridge padd is faster than shl. llvm-svn: 143311 | |||||
| * | PPC: Disable moves for all CR subregisters. | Benjamin Kramer | 2011-10-29 | 1 | -3/+1 | |
| | | | | | | | Should fix assertion failures on ppc buildbots. llvm-svn: 143290 | |||||
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index : bcm5719-llvm | |
| Project Ortega BCM5719 LLVM | Raptor Computing Systems |
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