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* Add register class hack that needs to go away, but makes it more obviousEric Christopher2010-08-241-12/+35
| | | | | | | | that it needs to go away. Use loadRegFromStackSlot where possible. Also, remember to update the value map. llvm-svn: 111883
* Add some more debugging code, make it more obvious that RegOffset isEric Christopher2010-08-241-12/+20
| | | | | | getting an address for an object and select some default values. llvm-svn: 111871
* Don't need the extra register here.Eric Christopher2010-08-231-6/+4
| | | | llvm-svn: 111864
* Add some more "get address into register" code and a more TODOs/FIXMEs.Eric Christopher2010-08-231-0/+22
| | | | llvm-svn: 111860
* Add an ARMFunctionInfo member and use it.Eric Christopher2010-08-231-1/+5
| | | | llvm-svn: 111854
* Start getting ARM loads/address computation going.Eric Christopher2010-08-231-0/+73
| | | | llvm-svn: 111850
* Start using target speficic nodes for shuffles: pshufhw and pshuflwBruno Cardoso Lopes2010-08-231-1/+19
| | | | llvm-svn: 111837
* tyopsGabor Greif2010-08-233-3/+3
| | | | llvm-svn: 111835
* Add a new llvm.x86.int intrinsic, allowing access to the Chris Lattner2010-08-231-3/+7
| | | | | | x86 int and int3 instructions. Patch by Peter Housel! llvm-svn: 111831
* random improvement for variable shift codegen.Chris Lattner2010-08-231-2/+14
| | | | llvm-svn: 111813
* Revert invalid r111792. Jump tables are not broken on x86-64 / coff,Anton Korobeynikov2010-08-231-6/+0
| | | | | | | it's COFF emitter which does not support differences of two symbols (and needs to be fixed). GAS is pretty fine with code produced. llvm-svn: 111801
* Workaround broken jump tables on x86-64 COFF.Michael J. Spencer2010-08-231-0/+6
| | | | llvm-svn: 111792
* Use rip-rel addressing on win64 by default. For this we justAnton Korobeynikov2010-08-212-15/+19
| | | | | | defaults to small pic code model. llvm-svn: 111741
* MC: Add partial x86-64 support to COFF.Michael J. Spencer2010-08-212-4/+13
| | | | llvm-svn: 111728
* Fix x86 fast-isel's cmp+branch folding to avoid folding when theDan Gohman2010-08-211-2/+4
| | | | | | | | comparison is in a different basic block from the branch. In such cases, the comparison's operands may not have initialized virtual registers available. llvm-svn: 111709
* Prepare LowerVECTOR_SHUFFLEv8i16 to use x86 target specific nodes directlyBruno Cardoso Lopes2010-08-212-7/+12
| | | | llvm-svn: 111704
* This is the first step towards refactoring the x86 vector shuffle code. TheBruno Cardoso Lopes2010-08-204-0/+493
| | | | | | | | | | | | general idea here is to have a group of x86 target specific nodes which are going to be selected during lowering and then directly matched in isel. The commit includes the addition of those specific nodes and a *bunch* of patterns, and incrementally we're going to switch between them and what we have right now. Both the patterns and target specific nodes can change as we move forward with this work. llvm-svn: 111691
* Create the new linker type "linker_private_weak_def_auto".Bill Wendling2010-08-202-1/+4
| | | | | | | | | | | It's similar to "linker_private_weak", but it's known that the address of the object is not taken. For instance, functions that had an inline definition, but the compiler decided not to inline it. Note, unlike linker_private and linker_private_weak, linker_private_weak_def_auto may have only default visibility. The symbols are removed by the linker from the final linked image (executable or dynamic library). llvm-svn: 111684
* Replace the arm.neon.vmovls and vmovlu intrinsics with vector sign-extend andBob Wilson2010-08-202-20/+22
| | | | | | zero-extend operations. llvm-svn: 111614
* Fix loop conditionals (MO.isDef() asserts that it's a reg) andEric Christopher2010-08-201-1/+2
| | | | | | move some constraints around. llvm-svn: 111594
* Add a couple of random comments.Eric Christopher2010-08-201-0/+3
| | | | llvm-svn: 111592
* Better handling of offsets on frame index references. rdar://8277890Jim Grosbach2010-08-192-9/+65
| | | | llvm-svn: 111585
* Add Thumb1 support for virtual frame indices.Jim Grosbach2010-08-193-132/+160
| | | | | | rdar://8277890 llvm-svn: 111533
* Silence warning.Eric Christopher2010-08-191-1/+1
| | | | llvm-svn: 111518
* fix PR7465, mishandling of lcall and ljmp: intersegment long Chris Lattner2010-08-194-12/+28
| | | | | | call and jumps. llvm-svn: 111496
* minor progress towards fixing PR7465Chris Lattner2010-08-191-2/+2
| | | | llvm-svn: 111494
* Add an AddOptionalDefs method and use it.Eric Christopher2010-08-191-21/+64
| | | | llvm-svn: 111489
* Add the "isCompare" attribute to the defm instead of each individual instr.Bill Wendling2010-08-191-3/+1
| | | | llvm-svn: 111481
* Don't call Predicate_* in Mips.Jakob Stoklund Olesen2010-08-182-9/+4
| | | | llvm-svn: 111468
* Remove extra header.Eric Christopher2010-08-181-1/+0
| | | | llvm-svn: 111456
* Enable ARM base register reuse to local stack slot allocation. Whenever a newJim Grosbach2010-08-181-0/+69
| | | | | | | | | frame index reference to an object in the local block is seen, check if it's near enough to any previously allocaated base register to re-use. rdar://8277890 llvm-svn: 111443
* Minor simplification. Gets rid of a needless temporary.Bill Wendling2010-08-181-4/+3
| | | | llvm-svn: 111430
* Marked with ATTRIBUTE_USED so that clang doesn't complain.Bill Wendling2010-08-181-1/+1
| | | | llvm-svn: 111383
* Add hook for re-using virtual base registers for local stack slot access.Jim Grosbach2010-08-182-0/+8
| | | | | | | | | | Nothing fancy, just ask the target if any currently available base reg is in range for the instruction under consideration and use the first one that is. Placeholder ARM implementation simply returns false for now. ongoing saga of rdar://8277890 llvm-svn: 111374
* Fix a bug with insertelement on SPU. Kalle Raiskila2010-08-181-6/+11
| | | | | | | The previous algorithm in LowerVECTOR_SHUFFLE didn't check all requirements for "monotonic" shuffles. llvm-svn: 111361
* Remove all traces of v2[i,f]32 on SPU. Kalle Raiskila2010-08-185-110/+4
| | | | | | | | The "half vectors" are now widened to full size by the legalizer. The only exception is in parameter passing, where half vectors are expanded. This causes changes to some dejagnu tests. llvm-svn: 111360
* Change SPU C calling convention to match that described in Kalle Raiskila2010-08-181-11/+12
| | | | | | | | "SPU Application Binary Interface Specification, v1.9" by IBM. Specifically: use r3-r74 to pass parameters and the return value. llvm-svn: 111358
* remove some dead code.Chris Lattner2010-08-182-12/+0
| | | | llvm-svn: 111345
* remove some code that is dead now that lea's are modeled with segment registers.Chris Lattner2010-08-181-14/+0
| | | | llvm-svn: 111343
* Expand ZERO_EXTEND operations for NEON vector types.Bob Wilson2010-08-181-0/+1
| | | | | | Testcase from Nick Lewycky. llvm-svn: 111341
* Add materialization of virtual base registers for frame indices allocated intoJim Grosbach2010-08-172-0/+47
| | | | | | | | | | | | | the local block. Resolve references to those indices to a new base register. For simplification and testing purposes, a new virtual base register is allocated for each frame index being resolved. The result is truly horrible, but correct, code that's good for exercising the new code paths. Next up is adding thumb1 support, which should be very simple. Following that will be adding base register re-use and implementing a reasonable ARM heuristic for when a virtual base register should be generated at all. llvm-svn: 111315
* Revert part of one of the prev. patches - tailjmp will follow later.Anton Korobeynikov2010-08-171-1/+0
| | | | llvm-svn: 111291
* More fixes for win64:Anton Korobeynikov2010-08-173-6/+10
| | | | | | | | - Do not clobber al during variadic calls, this is AMD64 ABI-only feature - Emit wincall64, where necessary Patch by Cameron Esfahani! llvm-svn: 111289
* Enable more win64 calls folding opportunities.Anton Korobeynikov2010-08-171-0/+2
| | | | | | Patch by Cameron Esfahani! llvm-svn: 111288
* Don't call tablegen'ed Predicate_* functions in the ARM target.Jakob Stoklund Olesen2010-08-173-11/+15
| | | | llvm-svn: 111277
* 80 column cleanup.Jim Grosbach2010-08-173-32/+37
| | | | llvm-svn: 111266
* Don't call Predicate_* methods directly from Sparc target.Jakob Stoklund Olesen2010-08-172-14/+6
| | | | | | | | | Modernize predicates a bit. The Predicate_* methods are not used by TableGen any longer. They are only emitted for the sake of legacy code. llvm-svn: 111263
* Add hook to examine an instruction referencing a frame index to determineJim Grosbach2010-08-172-0/+42
| | | | | | | | | | | | | | | whether to allocate a virtual frame base register to resolve the frame index reference in it. Implement a simple version for ARM to aid debugging. In LocalStackSlotAllocation, scan the function for frame index references to local frame indices and ask the target whether to allocate virtual frame base registers for any it encounters. Purely infrastructural for debug output. Next step is to actually allocate base registers, then add intelligent re-use of them. rdar://8277890 llvm-svn: 111262
* explicitly handle no-op cases for clarity. Fixes clang warning.Jim Grosbach2010-08-171-0/+3
| | | | llvm-svn: 111260
* Change ARM PKHTB and PKHBT instructions to use a shift_imm operand to avoidBob Wilson2010-08-175-39/+69
| | | | | | | printing "lsl #0". This fixes the remaining parts of pr7792. Make corresponding changes for encoding/decoding these instructions. llvm-svn: 111251
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