| Commit message (Collapse) | Author | Age | Files | Lines |
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llvm-svn: 79101
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llvm-svn: 79098
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PIC16DebugInfo currently rely on NameStr of composite type descriptors to uniquely
identify debug info for two aggregate type decls with same name.
This implementation will change when we have MDNodes based debug info implemenatation in place
llvm-svn: 79097
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llvm-svn: 79094
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The Link Register is volatile when using the 32-bit SVR4 ABI.
Make it possible to use the 64-bit SVR4 ABI.
Add non-volatile registers for the 64-bit SVR4 ABI.
Make sure r2 is a reserved register when using the 64-bit SVR4 ABI.
Update PPCFrameInfo for the 64-bit SVR4 ABI.
Add FIXME for 64-bit Darwin PPC.
Insert NOP instruction after direct function calls.
Emit official procedure descriptors.
Create TOC entries for GlobalAddress references.
Spill 64-bit non-volatile registers to the correct slots.
Only custom lower VAARG when using the 32-bit SVR4 ABI.
Use simple VASTART lowering for the 64-bit SVR4 ABI.
llvm-svn: 79091
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llvm-svn: 79084
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llvm-svn: 79082
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the class it defines.
llvm-svn: 79081
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llvm-svn: 79080
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support for globals going into the appropriate sections with the flags.
This hopefully finishes unbreaking the previous behavior that I broke before.
llvm-svn: 79079
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them to null out the default section pointers.
llvm-svn: 79078
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class which represents the XCore cp/dp section flags. No functionality
change yet.
llvm-svn: 79077
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"the current basic block".
llvm-svn: 79069
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is frameless.
llvm-svn: 79067
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the register save area if %al is 0. This avoids touching xmm
regsiters when they aren't actually used.
llvm-svn: 79061
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-disable-fp-elim.
llvm-svn: 79039
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libcall. Take advantage of this in the ARM backend to rectify broken
choice of CC when hard float is in effect. PIC16 may want to see if
it could be of use in MakePIC16Libcall, which works unchanged.
Patch by Sandeep!
llvm-svn: 79033
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llvm-svn: 79032
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llvm-svn: 79030
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llvm-svn: 79026
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llvm-svn: 79024
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llvm-svn: 79022
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llvm-svn: 79015
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llvm-svn: 79014
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llvm-svn: 79012
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llvm-svn: 79009
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LLVMContext changes,
as well as the StringRef change.
llvm-svn: 79006
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implemented so far) are recognized during legalization, it is easy to fall
back to the default expansion for other shuffles.
llvm-svn: 78995
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scalar_to_vector. Generate these VDUP nodes during legalization instead
of trying to recognize the pattern during selection.
llvm-svn: 78994
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target-specific VDUPLANE nodes. This allows the subreg handling for the
quad-register version to be done easily with Pats in the .td file, instead
of with custom code in ARMISelDAGToDAG.cpp.
llvm-svn: 78993
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specific printer (this only works on x86, for now).
- This makes it possible to do some correctness checking of the parsing and
matching, since we can compare the results of 'as' on the original input, to
those of 'as' on the output from llvm-mc.
- In theory, we could now have an easy ATT -> Intel syntax converter. :)
llvm-svn: 78986
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to print one instruction.
llvm-svn: 78985
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llvm-svn: 78984
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llvm-svn: 78970
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llvm-svn: 78968
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accidentally match unrelated things.
llvm-svn: 78966
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AsmPrinter instance (instead of just a FunctionPass)
llvm-svn: 78962
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must be emitted for PowerPC-Linux '.bss' section
llvm-svn: 78958
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llvm-svn: 78948
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TargetAsmInfo. This eliminates a dependency on TargetMachine.h from
TargetRegistry.h, which technically was a layering violation.
- Clients probably can only sensibly pass in the same TargetAsmInfo as the
TargetMachine has, but there are only limited clients of this API.
llvm-svn: 78928
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llvm-svn: 78921
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x86_64-apple-darwin10.
--- Reverse-merging r78895 into '.':
U test/CodeGen/PowerPC/2008-12-12-EH.ll
U lib/Target/DarwinTargetAsmInfo.cpp
--- Reverse-merging r78892 into '.':
U include/llvm/Target/DarwinTargetAsmInfo.h
U lib/Target/X86/X86TargetAsmInfo.cpp
U lib/Target/X86/X86TargetAsmInfo.h
U lib/Target/ARM/ARMTargetAsmInfo.h
U lib/Target/ARM/ARMTargetMachine.cpp
U lib/Target/ARM/ARMTargetAsmInfo.cpp
U lib/Target/PowerPC/PPCTargetAsmInfo.cpp
U lib/Target/PowerPC/PPCTargetAsmInfo.h
U lib/Target/PowerPC/PPCTargetMachine.cpp
G lib/Target/DarwinTargetAsmInfo.cpp
llvm-svn: 78919
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llvm-svn: 78918
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llvm-svn: 78917
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llvm-svn: 78916
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Remove CooperTargetMachine, as currently only one is supported.
llvm-svn: 78914
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llvm-svn: 78908
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llvm-svn: 78905
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llvm-svn: 78904
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implemented somewhat differently than before, but it should have
the same functionality and the previous testcase passes again.
llvm-svn: 78900
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