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* Fix a typo in an assertion message.Bob Wilson2009-09-181-1/+1
| | | | llvm-svn: 82284
* It's inefficient to have place the exception tables (which contain the LSDA)Bill Wendling2009-09-181-2/+2
| | | | | | | | | into the __DATA section. At launch time, dyld has to update most of the section to fix up the type info pointers. It's better to place it into the __TEXT section and use pc-rel indirect pointer encodings. Similar to the personality routine. llvm-svn: 82274
* Enhance EmitInstrWithCustomInserter() so target can specify CFG changes that ↵Evan Cheng2009-09-1820-20/+40
| | | | | | | | sdisel will use to properly complete phi nodes. Not functionality change yet. llvm-svn: 82273
* Fix cmake build, which has a different -I thatShantonu Sen2009-09-181-1/+1
| | | | | | causes the "../foo" to not find the file llvm-svn: 82270
* Make a new X8632_MachoTargetObjectFile TLOF implementation whose Chris Lattner2009-09-185-27/+47
| | | | | | | | | | | | | | | | | | | | | | getSymbolForDwarfGlobalReference is smart enough to know that it needs to register the stub it references with MachineModuleInfoMachO, so that it gets emitted at the end of the file. Move stub emission from X86ATTAsmPrinter::doFinalization to the new X86ATTAsmPrinter::EmitEndOfAsmFile asmprinter hook. The important thing here is that EmitEndOfAsmFile is called *after* the ehframes are emitted, so we get all the stubs. This allows us to remove a gross hack from the asmprinter where it would "just know" that it needed to output stubs for personality functions. Now this is all driven from a consistent interface. The testcase change is just reordering the expected output now that the stubs come out after the ehframe instead of before. This also unblocks other changes that Bill wants to make. llvm-svn: 82269
* Model the carry bit on ppc32. Without this we couldDale Johannesen2009-09-183-28/+60
| | | | | | | move a SUBFC (etc.) below the SUBFE (etc.) that consumed the carry bit. Add missing ADDIC8, noticed along the way. llvm-svn: 82266
* Add support for using the FLAGS result of or, xor, and and instructionsDan Gohman2009-09-184-5/+365
| | | | | | | on x86, to avoid explicit test instructions. A few existing tests changed due to arbitrary register allocation differences. llvm-svn: 82263
* Added RCL and RCR (rotate left and right with aSean Callanan2009-09-182-0/+124
| | | | | | | carry bit) instructions to the Intel instruction tables. llvm-svn: 82260
* This file can need access to the X86 instruction enums when the table ↵Chris Lattner2009-09-181-0/+1
| | | | | | exceeds 32-bits. llvm-svn: 82235
* Allow symbols to start from the digit if target requests it. This allows, ↵Anton Korobeynikov2009-09-181-0/+1
| | | | | | | | | e.g. pinning variables to specified absolute address. Make use of this feature for MSP430. This unbreaks PR4776. llvm-svn: 82227
* pass machinemoduleinfo down into getSymbolForDwarfGlobalReference, Chris Lattner2009-09-173-0/+4
| | | | | | currently unused. llvm-svn: 82157
* Added the LODS (load byte into register, usuallySean Callanan2009-09-162-0/+10
| | | | | | | as part string parsing) instructions to the Intel instruction tables. llvm-svn: 82089
* Added the LAR (load segment access rights)Sean Callanan2009-09-162-0/+21
| | | | | | instructions to the Intel instruction tables. llvm-svn: 82084
* Added the LOOP family of instructions to the IntelSean Callanan2009-09-161-0/+6
| | | | | | instruction tables. llvm-svn: 82083
* Added an alternate form of register-register CMPSean Callanan2009-09-162-0/+8
| | | | | | to the Intel instruction tables. llvm-svn: 82081
* Expand vector floating-point conversions not supported by NEON.Bob Wilson2009-09-161-0/+6
| | | | llvm-svn: 82074
* Fix incorrect assert that should be a user error for code like 'mov $0, %%eax'.Kevin Enderby2009-09-161-1/+2
| | | | llvm-svn: 82054
* move FnStubs/GVSTubs/HiddenGVStub handling out of the X86 asmprinterChris Lattner2009-09-164-43/+44
| | | | | | and use MachineModuleInfoMachO instead. llvm-svn: 82022
* revert a hunk of r82018 that wasn't supposed to go in yet.Chris Lattner2009-09-161-0/+5
| | | | llvm-svn: 82020
* add a new MachineModuleInfoMachO class, which is the per-moduleChris Lattner2009-09-161-5/+0
| | | | | | stuff common across all macho targets. llvm-svn: 82018
* tidy upChris Lattner2009-09-161-3/+3
| | | | llvm-svn: 82011
* rearrange X86ATTAsmPrinter::doFinalization, making a scan of Chris Lattner2009-09-162-33/+43
| | | | | | the global variable list only happen for COFF targets. llvm-svn: 82010
* remove the AsmPrinter::printMCInst hook hack now thatChris Lattner2009-09-161-2/+1
| | | | | | we have MCInstPrinter. llvm-svn: 82006
* fix cmake buildShantonu Sen2009-09-161-0/+1
| | | | llvm-svn: 81999
* Do not try and sink a load whose chain result has more than one use, when Nate Begeman2009-09-161-2/+5
| | | | | | | | trying to create RMW opportunities in the x86 backend. This can cause a cycle to appear in the graph, since the other uses may eventually feed into the TokenFactor we are sinking the load below. llvm-svn: 81996
* Added the ENTER instruction, which sets up a stackSean Callanan2009-09-161-0/+5
| | | | | | frame, to the Intel instruction tables. llvm-svn: 81995
* Added the definitions for one-bit left shifts toSean Callanan2009-09-162-4/+15
| | | | | | | | | | the Intel instruction tables. The patterns will stay blank because ADD reg, reg is faster, but having the encoding available is useful for the disassembler. llvm-svn: 81994
* Removed a few instructions that were alreadySean Callanan2009-09-161-5/+0
| | | | | | covered by other definitions. llvm-svn: 81992
* Big change #1 for personality function references:Chris Lattner2009-09-166-12/+103
| | | | | | | | | | | | | | | | | | | | | | | | Eliminate the PersonalityPrefix/Suffix & NeedsIndirectEncoding fields from MAI: they aren't part of the asm syntax, they are related to the structure of the object file. To replace their functionality, add a new TLOF::getSymbolForDwarfGlobalReference method which asks targets to decide how to reference a global from EH in a pc-relative way. The default implementation just returns the symbol. The default darwin implementation references the symbol through an indirect $non_lazy_ptr stub. The bizarro x86-64 darwin specialization handles the weird "foo@GOTPCREL+4" hack. DwarfException.cpp now uses this to emit the reference to the symbol in the right way, and this also eliminates another horrible hack from DwarfException.cpp: - if (strcmp(MAI->getPersonalitySuffix(), "+4@GOTPCREL")) - O << "-" << MAI->getPCSymbol(); llvm-svn: 81991
* Added a variety of floating-point and SSE instructions.Sean Callanan2009-09-162-0/+51
| | | | | | | | | | | | All of these do not have patterns (they're for the disassembler). Many of the floating-point instructions will probably be rolled into definitions that have patterns, and may eventually be superseded by mdefs. So I put them together and left a comment. llvm-svn: 81979
* Expand some more vector operations not supported by Neon.Bob Wilson2009-09-161-0/+6
| | | | llvm-svn: 81969
* Neon does not support vector divide or remainder. Expand them.Bob Wilson2009-09-161-0/+8
| | | | llvm-svn: 81966
* eliminate the PPC backend's implementation of EmitExternalGlobalChris Lattner2009-09-162-15/+3
| | | | | | | | | | | | | | | | and use PersonalityPrefix/Suffix to achieve the same effect (like the x86 backend). This changes the code generated for ppc static mode, but guess what, we were generating this before: .byte 0x9B ; Personality (indirect pcrel sdata4) .long ___gxx_personality_v0-. ; Personality which is not correct! (it is not an 'indirect' reference). llvm-svn: 81965
* Expand all v2f64 arithmetic operations for Neon.Bob Wilson2009-09-151-0/+27
| | | | | | | Radar 7200803. (This should also fix the SingleSource/UnitTests/Vector/sumarray-dbl test.) llvm-svn: 81959
* Added far return instructions (that is, returns to Sean Callanan2009-09-151-0/+4
| | | | | | | code in other segments) to the Intel instruction tables. llvm-svn: 81953
* Updated comments per Eli's suggestion.Sean Callanan2009-09-152-2/+4
| | | | llvm-svn: 81923
* Added register-to-register ADD instructions to theSean Callanan2009-09-152-0/+13
| | | | | | | | Intel tables, where the source operand is specified by the R/M field and the destination operand by the Reg field. llvm-svn: 81914
* Added a new register class for segment registersSean Callanan2009-09-153-0/+25
| | | | | | | | to the Intel register table. Added 16- and 64-bit MOVs to and from the segment registers to the Intel instruction tables. llvm-svn: 81895
* Change the marker byte for stubs from 0xcd to 0xce (another form ofDale Johannesen2009-09-151-3/+6
| | | | | | | | | interrupt instruction, which shouldn't arise any other way). 0xcd is also used by JITMemoryManager to initialize the buffer to garbage, which means it could appear following a noreturn call even when that is not a stub, confusing X86CompilationCallback2. PR 4929. llvm-svn: 81888
* fix PR4984 by ensuring that fastisel adds properly sign extended GEP ↵Chris Lattner2009-09-151-1/+1
| | | | | | | | displacement values to machineinstrs. llvm-svn: 81886
* add missing fileChris Lattner2009-09-151-0/+32
| | | | llvm-svn: 81881
* Handle AddrMode4 for Thumb2 in rewriteT2FrameIndex. This occurs forBob Wilson2009-09-151-0/+5
| | | | | | | | | | | VLDM/VSTM instructions, and without this check, the code assumes that an offset is allowed, as it would be with VLDR/VSTR. The asm printer, however, silently drops the offset, producing incorrect code. Since the address register in this case is either the stack or frame pointer, the spill location ends up conflicting with some other stack slot or with outgoing arguments on the stack. llvm-svn: 81879
* Fix superreg use in ARMAsmPrinter. Approved by Anton Korobeynikov.Sandeep Patel2009-09-151-2/+2
| | | | llvm-svn: 81878
* several major improvements to the sparc backend: support for weak linkageChris Lattner2009-09-158-48/+197
| | | | | | and PIC codegen. Patch by Venkatraman Govindaraju! llvm-svn: 81877
* Remove invalid add_dependencies line to unbreak the CMake build.Ted Kremenek2009-09-151-1/+1
| | | | llvm-svn: 81827
* Don't pull a load through a callseq_start if the load's chainDan Gohman2009-09-151-1/+2
| | | | | | | | | has multiple uses, as one of the other uses may be on a path to a different node above the callseq_start, because that leads to a cyclic graph. This problem is exposed when -combiner-global-alias-analysis is used. This fixes PR4880. llvm-svn: 81821
* Modified the Intel instruction tables to includeSean Callanan2009-09-152-4/+37
| | | | | | | versions of CALL and JMP with segmented addresses provided in-line, as pairs of immediates. llvm-svn: 81818
* Added the first bits of the ARM target assembler to llvm-mc. For now it onlyKevin Enderby2009-09-154-1/+115
| | | | | | | | parses the .word directive as 4 bytes and ARMAsmParser::ParseInstruction will give an error is called. Broke out the test of the .word directive into two different test cases, one for x86 and one for arm. llvm-svn: 81817
* On x86-64, the 32-bit cmov doesn't actually clear the high 32-bit ofDan Gohman2009-09-151-3/+5
| | | | | | its result if the condition is false. llvm-svn: 81814
* trivial whitespace cleanupJim Grosbach2009-09-141-2/+2
| | | | llvm-svn: 81773
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