summaryrefslogtreecommitdiffstats
path: root/llvm/lib/Target
Commit message (Collapse)AuthorAgeFilesLines
* Two more test cases: or_ops.ll (arithmetic or operations) and vecinsert.llScott Michel2007-12-192-6/+5
| | | | | | (vector insertions) llvm-svn: 45216
* Add new immed16.ll test case, fix CellSPU errata to make test case work.Scott Michel2007-12-195-13/+23
| | | | llvm-svn: 45196
* Mark the "isRemat" instruction as never having side effects.Bill Wendling2007-12-191-1/+1
| | | | llvm-svn: 45190
* add an obvious load folding missed optzn.Chris Lattner2007-12-181-0/+21
| | | | llvm-svn: 45161
* Fold certain additions through selects (and their compares) so as to ↵Christopher Lamb2007-12-181-18/+0
| | | | | | | | eliminate subtractions. This code is often produced by the SMAX expansion in SCEV. This implements test/Transforms/InstCombine/2007-12-18-AddSelCmpSub.ll llvm-svn: 45158
* add a missed case.Chris Lattner2007-12-181-0/+18
| | | | llvm-svn: 45141
* Add "mayHaveSideEffects" and "neverHasSideEffects" flags to some instructions. IBill Wendling2007-12-177-21/+57
| | | | | | | | | based what flag to set on whether it was already marked as "isRematerializable". If there was a further check to determine if it's "really" rematerializable, then I marked it as "mayHaveSideEffects" and created a check in the X86 back-end similar to the remat one. llvm-svn: 45132
* - Restore some i8 functionality in CellSPUScott Michel2007-12-177-55/+479
| | | | | | - New test case: nand.ll llvm-svn: 45130
* LD_Fp64m should have "isRematerializable" set.Bill Wendling2007-12-171-1/+2
| | | | llvm-svn: 45128
* As per feedback, revised comments to (hopefully) make the different side effectBill Wendling2007-12-171-3/+12
| | | | | | flags clearer. llvm-svn: 45120
* Change the PointerType api for creating pointer types. The old functionality ↵Christopher Lamb2007-12-171-3/+4
| | | | | | of PointerType::get() has become PointerType::getUnqual(), which returns a pointer in the generic address space. The new prototype of PointerType::get() requires both a type and an address space. llvm-svn: 45082
* don't violate C TBAA rules, use FloatToBits instead.Chris Lattner2007-12-161-22/+10
| | | | llvm-svn: 45076
* fix a questionable cast, thanks to Mike Stump for pointing this out.Chris Lattner2007-12-161-1/+1
| | | | llvm-svn: 45075
* Fix the JIT encoding of cmp*ss, which aborts with this assertion currently:Chris Lattner2007-12-162-4/+6
| | | | | | | | | X86CodeEmitter.cpp:378: failed assertion `0 && "Immediate size not set!"' I *think* this is right, but Evan, please verify. It also looks like CMPSDrr and maybe others are missing this info. Evan, plz investigate. llvm-svn: 45074
* Make better use of instructions that clear high bits; fix various 2-wide ↵Evan Cheng2007-12-153-45/+119
| | | | | | shuffle bugs. llvm-svn: 45058
* Start committing working test cases for CellSPU.Scott Michel2007-12-154-4/+52
| | | | llvm-svn: 45050
* Actually, MOVPQIto64mr is a dup of MOVPQI2QImr, MOV64toPQIrm is a dup of ↵Evan Cheng2007-12-142-11/+2
| | | | | | MOVQI2PQIrm. llvm-svn: 45041
* Fix (mem) <-> low 64-bits of xmm bugs pointed out by David Greene. Mac OS X ↵Evan Cheng2007-12-141-8/+8
| | | | | | Leopard assembler recognizes movq. llvm-svn: 45040
* x86-32 long doubles are 4-byte aligned on the stackDale Johannesen2007-12-141-1/+1
| | | | | | for parameter passing (only for that, on Darwin). llvm-svn: 45038
* Fix bsf / bsr jit encoding.Evan Cheng2007-12-142-6/+6
| | | | llvm-svn: 45037
* Oops. Forgot these.Evan Cheng2007-12-141-4/+6
| | | | llvm-svn: 45036
* Fix Intel asm syntax for the bsr and bsf instructions.Dan Gohman2007-12-142-12/+12
| | | | llvm-svn: 45030
* Fix ctlz and cttz. llvm definition requires them to return number of bits in ↵Evan Cheng2007-12-142-14/+42
| | | | | | of the src type when value is zero. llvm-svn: 45029
* Implement ctlz and cttz with bsr and bsf.Evan Cheng2007-12-144-9/+103
| | | | llvm-svn: 45024
* Add flags to indicate that there are "never" side effects or that there "may be"Bill Wendling2007-12-141-0/+5
| | | | | | side effects for machine instructions. llvm-svn: 45022
* Fold some and + shift in x86 addressing mode.Evan Cheng2007-12-132-6/+48
| | | | llvm-svn: 44970
* Implicit def instructions, e.g. X86::IMPLICIT_DEF_GR32, are always ↵Evan Cheng2007-12-1212-0/+19
| | | | | | re-materializable and they should not be spilled. llvm-svn: 44960
* Remove host endianness info from TargetData andDuncan Sands2007-12-121-9/+0
| | | | | | | | put it in a new header System/Host.h instead. Instead of getting the endianness from configure, calculate it directly. llvm-svn: 44959
* Allow vector integer constants to be created withDan Gohman2007-12-121-0/+6
| | | | | | | | SelectionDAG::getConstant, in the same way as vector floating-point constants. This allows the legalize expansion code for @llvm.ctpop and friends to be usable with vector types. llvm-svn: 44954
* Use shuffles to implement insert_vector_elt for i32, i64, f32, and f64.Evan Cheng2007-12-121-36/+18
| | | | llvm-svn: 44929
* Lower a build_vector with all constants into a constpool load unless it can ↵Evan Cheng2007-12-121-14/+16
| | | | | | be done with a move to low part. llvm-svn: 44921
* Correct typo for Linux: s/esp/%rsp/Scott Michel2007-12-121-1/+1
| | | | llvm-svn: 44904
* Allow the JIT to encode MMX instructionsNate Begeman2007-12-111-8/+8
| | | | llvm-svn: 44869
* - Improved v8i16 shuffle lowering. It now uses pshuflw and pshufhw as much asEvan Cheng2007-12-111-71/+274
| | | | | | | | | possible before resorting to pextrw and pinsrw. - Better codegen for v4i32 shuffles masquerading as v8i16 or v16i8 shuffles. - Improves (i16 extract_vector_element 0) codegen by recognizing (i32 extract_vector_element 0) does not require a pextrw. llvm-svn: 44836
* x86 doesn't actually want to custom lower v3i32Nate Begeman2007-12-111-0/+3
| | | | llvm-svn: 44835
* Move TargetData::hostIsLittleEndian out of line, which means we Chris Lattner2007-12-111-0/+9
| | | | | | | | don't have to #include config.h in it. #including config.h breaks other projects that have their own autoconf stuff and try to #include the llvm headers. One obscure example is llvm-gcc. llvm-svn: 44825
* Hey, English is not my native language :)Anton Korobeynikov2007-12-101-1/+1
| | | | llvm-svn: 44820
* Clarify the need of CFI() stuffAnton Korobeynikov2007-12-101-0/+3
| | | | llvm-svn: 44819
* Provide convenient way to disable CFI stuff for old/broken assemblers.Anton Korobeynikov2007-12-101-70/+76
| | | | | | Use it for Darwin. llvm-svn: 44818
* Disable cfi directives for now, darwin does't support them.Chris Lattner2007-12-101-67/+70
| | | | | | | | | | | These should probably be something like: CFI(".cfi_def_cfa_offset 16\n") where CFI is defined to a noop on darwin and other platforms that don't support those directives. llvm-svn: 44803
* And finally annotate X86-64 version of callback. Anton Korobeynikov2007-12-101-24/+51
| | | | | | All bad stuff from SSE version is implicitely inherited :) llvm-svn: 44794
* Provide annotation for SSE version of callback. It's even moreAnton Korobeynikov2007-12-101-1/+26
| | | | | | broken, because doesn't mark xmm regs properly llvm-svn: 44793
* Annotate JIT callback function with call frame infromation. Anton Korobeynikov2007-12-101-1/+19
| | | | | | | This will allow us (theoretically) to unwind through JITer. The code wasn't verified, so I'm pretty sure offsets are wrong :) llvm-svn: 44792
* Reverting 44702. It wasn't correct to rename them.Bill Wendling2007-12-082-2/+2
| | | | llvm-svn: 44727
* aesthetic changes, no functionality change. Evan, it's not clearChris Lattner2007-12-081-39/+41
| | | | | | | what 'Available' is, please add a comment near it and rename it if appropriate. llvm-svn: 44703
* Renaming:Bill Wendling2007-12-082-2/+2
| | | | | | | isTriviallyReMaterializable -> hasNoSideEffects isReallyTriviallyReMaterializable -> isTriviallyReMaterializable llvm-svn: 44702
* Fix a significant code quality regression I introduced on PPC64 quite Chris Lattner2007-12-081-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | a while ago. We now produce: _foo: mflr r0 std r0, 16(r1) ld r2, 16(r1) std r2, 0(r3) ld r0, 16(r1) mtlr r0 blr instead of: _foo: mflr r0 std r0, 16(r1) lis r0, 0 ori r0, r0, 16 ldx r2, r1, r0 std r2, 0(r3) ld r0, 16(r1) mtlr r0 blr for: void foo(void **X) { *X = __builtin_return_address(0); } on ppc64. llvm-svn: 44701
* implement __builtin_return_addr(0) on ppc.Chris Lattner2007-12-085-11/+58
| | | | llvm-svn: 44700
* refactor some code to avoid overloading the name 'usesLR' in Chris Lattner2007-12-083-12/+14
| | | | | | | different places to mean different things. Document what the one in PPCFunctionInfo means and when it is valid. llvm-svn: 44699
* DohEvan Cheng2007-12-081-1/+1
| | | | llvm-svn: 44694
OpenPOWER on IntegriCloud