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* * Correctly handle the MovePCtoLR pseudo-instr with a bl to next instrMisha Brukman2004-10-231-9/+15
| | | | | | * Stop the confusion of using rv and Addr for global addresses: just use rv llvm-svn: 17195
* Add BA, BL, and BLA opcodesMisha Brukman2004-10-231-1/+4
| | | | llvm-svn: 17193
* * Do not emit IMPLICIT_DEF pseudo-instructionsMisha Brukman2004-10-231-6/+71
| | | | | | | | | * Convert register numbers from their opcode value to the real value, e.g. PPC::R1 => 1 and PPC::F1 => 1 * Add correct handling of loading of global values which are PC-relative -- implement ha16() and lo16() llvm-svn: 17190
* DForm_1, particularly used by store instructions, needs the immediate operand toMisha Brukman2004-10-231-1/+13
| | | | | | | be listed second as that is how the instructions are usually created (and is the correct asm syntax) so that it's assembled correctly from its constituents llvm-svn: 17183
* Fix the SPR field for MTLR, MFLR, MTCTR, and MFCTR instructions.Misha Brukman2004-10-231-4/+7
| | | | | | | The decimal value given in the manual (8 or 9) really needs to be multiplied by a factor of 32 because of the group of 5 zero bits after the register code. llvm-svn: 17182
* The value of the XO field for MFLR and MFCTR is 339, not 399Misha Brukman2004-10-231-2/+2
| | | | llvm-svn: 17181
* Remove extraneous blank lineMisha Brukman2004-10-231-1/+0
| | | | llvm-svn: 17180
* Align function arguments in function headersMisha Brukman2004-10-231-5/+4
| | | | llvm-svn: 17178
* Kill casts from integer types to unsigned byte, when the cast was only usedNate Begeman2004-10-231-0/+13
| | | | | | | | as the shift amount operand to a shift instruction. This was causing us to emit unnecessary clear operations for code such as: int foo(int x) { return 1 << x; } llvm-svn: 17175
* Clean up the output from this makefile so its not verbose.Reid Spencer2004-10-221-6/+8
| | | | llvm-svn: 17173
* Adjust rules for building .inc files due to Reid's changes of Makefile.rulesMisha Brukman2004-10-221-32/+5
| | | | llvm-svn: 17169
* Adjust to changes in Makefile.rulesReid Spencer2004-10-225-143/+26
| | | | llvm-svn: 17167
* We won't use automakeReid Spencer2004-10-2220-7322/+0
| | | | llvm-svn: 17155
* Remove debug code emitter from the JITMisha Brukman2004-10-211-3/+1
| | | | llvm-svn: 17151
* Make this compile.Alkis Evlogimenos2004-10-211-1/+1
| | | | llvm-svn: 17150
* * Added basic support for JITing functions, basic blocks, instruction encoding,Misha Brukman2004-10-211-20/+169
| | | | | | | | including registers, constants, and partial support for global addresses * The JIT is disabled by default to allow building llvm-gcc, which wants to test running programs during configure llvm-svn: 17149
* Don't clear or sign extend bool->int. This fires a few dozen times on the ↵Nate Begeman2004-10-201-0/+17
| | | | | | test suite llvm-svn: 17147
* Small performance improvement in generated C code:John Criswell2004-10-201-1/+23
| | | | | | | | | | | | Instead of unconditionally copying all phi node values into temporaries for all successor blocks, generate code that will determine what successor block will be called and then copy only those phi node values needed by the successor block. This seems to cut down namd execution time from being 8% higher than GCC to 4% higher than GCC. llvm-svn: 17144
* * Add baseline structural JIT code, but disable the JIT to allow llvm-gcc buildsMisha Brukman2004-10-191-8/+175
| | | | | | | | - Support added for functions, basic blocks, constant pool, constants, registers, and some basic support for globals, all untested * Turn assert()s into abort()s so that unimplemented functions fail in release llvm-svn: 17143
* Simplify mapping info generation. In particular, the LLVM-to-MachineInstr mapBrian Gaeke2004-10-191-86/+3
| | | | | | | is no longer emitted, and we do not reference any MachineCodeForInstruction information. llvm-svn: 17138
* Initial automake generated Makefile templateReid Spencer2004-10-1810-0/+7029
| | | | llvm-svn: 17136
* Improve compatibility with VC++, patch contributed by Morten Ofstad!Chris Lattner2004-10-182-1/+18
| | | | llvm-svn: 17126
* Print a semicolon for the unreacahble instruction. This fixes problemsChris Lattner2004-10-171-1/+1
| | | | | | where C requires semicolons in some cases to indicate null statements. llvm-svn: 17107
* Generate correct stubs for weak-linked symbolsNate Begeman2004-10-171-2/+3
| | | | llvm-svn: 17101
* The first hunk corrects a bug when printing undef null values. We would printChris Lattner2004-10-171-6/+11
| | | | | | | | 0->field, which is illegal. Now we print ((foo*)0)->field. The second hunk is an optimization to not print undefined phi values. llvm-svn: 17094
* Don't print stuff out from the code generator. This broke the JIT horriblyChris Lattner2004-10-171-1/+0
| | | | | | last night. :) bork! llvm-svn: 17093
* Make the library name SparcV9 specificReid Spencer2004-10-171-4/+4
| | | | llvm-svn: 17089
* Consolidate the definitionsReid Spencer2004-10-171-3/+2
| | | | llvm-svn: 17088
* PPC32GenCodeEmitter instead of PowerPCGenCodeEmitterReid Spencer2004-10-171-1/+1
| | | | llvm-svn: 17087
* Rewrite support for cast uint -> FP. In particular, we used to compile this:Chris Lattner2004-10-171-14/+23
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | double %test(uint %X) { %tmp.1 = cast uint %X to double ; <double> [#uses=1] ret double %tmp.1 } into: test: sub %ESP, 8 mov %EAX, DWORD PTR [%ESP + 12] mov %ECX, 0 mov DWORD PTR [%ESP], %EAX mov DWORD PTR [%ESP + 4], %ECX fild QWORD PTR [%ESP] add %ESP, 8 ret ... which basically zero extends to 8 bytes, then does an fild for an 8-byte signed int. Now we generate this: test: sub %ESP, 4 mov %EAX, DWORD PTR [%ESP + 8] mov DWORD PTR [%ESP], %EAX fild DWORD PTR [%ESP] shr %EAX, 31 fadd DWORD PTR [.CPItest_0 + 4*%EAX] add %ESP, 4 ret .section .rodata .align 4 .CPItest_0: .quad 5728578726015270912 This does a 32-bit signed integer load, then adds in an offset if the sign bit of the integer was set. It turns out that this is substantially faster than the preceeding sequence. Consider this testcase: unsigned a[2]={1,2}; volatile double G; void main() { int i; for (i=0; i<100000000; ++i ) G += a[i&1]; } On zion (a P4 Xeon, 3Ghz), this patch speeds up the testcase from 2.140s to 0.94s. On apoc, an athlon MP 2100+, this patch speeds up the testcase from 1.72s to 1.34s. Note that the program takes 2.5s/1.97s on zion/apoc with GCC 3.3 -O3 -fomit-frame-pointer. llvm-svn: 17083
* Unify handling of constant pool indexes with the other code paths, allowingChris Lattner2004-10-171-17/+17
| | | | | | us to use index registers for CPI's llvm-svn: 17082
* Give the asmprinter the ability to print memrefs with a constant pool index,Chris Lattner2004-10-171-26/+41
| | | | | | index reg and scale llvm-svn: 17081
* fold:Chris Lattner2004-10-171-3/+46
| | | | | | | | | | | | | | | | | | | | %X = and Y, constantint %Z = setcc %X, 0 instead of emitting: and %EAX, 3 test %EAX, %EAX je .LBBfoo2_2 # UnifiedReturnBlock We now emit: test %EAX, 3 je .LBBfoo2_2 # UnifiedReturnBlock This triggers 581 times on 176.gcc for example. llvm-svn: 17080
* All of these labels are off by one now that the unreachable instruction existsChris Lattner2004-10-171-21/+21
| | | | llvm-svn: 17079
* Implement bitfield insert by recognizing the following pattern:Nate Begeman2004-10-171-5/+111
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | 1. optional shift left 2. and x, immX 3. and y, immY 4. or z, x, y ==> rlwimi z, x, y, shift, mask begin, mask end where immX == ~immY and immX is a run of set bits. This transformation fires 32 times on voronoi, once on espresso, and probably several dozen times on external benchmarks such as gcc. To put this in terms of actual code generated for struct B { unsigned a : 3; unsigned b : 2; }; void storeA (struct B *b, int v) { b->a = v;} void storeB (struct B *b, int v) { b->b = v;} Old: _storeA: rlwinm r2, r4, 0, 29, 31 lwz r4, 0(r3) rlwinm r4, r4, 0, 0, 28 or r2, r4, r2 stw r2, 0(r3) blr _storeB: rlwinm r2, r4, 3, 0, 28 rlwinm r2, r2, 0, 27, 28 lwz r4, 0(r3) rlwinm r4, r4, 0, 29, 26 or r2, r2, r4 stw r2, 0(r3) blr New: _storeA: lwz r2, 0(r3) rlwimi r2, r4, 0, 29, 31 stw r2, 0(r3) blr _storeB: lwz r2, 0(r3) rlwimi r2, r4, 3, 27, 28 stw r2, 0(r3) blr llvm-svn: 17078
* I forgot that sparc no longer uses the shared asmwriter. Give it supportChris Lattner2004-10-171-2/+4
| | | | | | for undef. llvm-svn: 17075
* Add support for unreachable and undefChris Lattner2004-10-171-0/+6
| | | | llvm-svn: 17074
* Finally fix one of the oldest FIXMEs in the PowerPC backend: correctlyNate Begeman2004-10-162-12/+12
| | | | | | | | | | flag rotate left word immediate then mask insert (rlwimi) as a two-address instruction, and update the ISel usage of the instruction accordingly. This will allow us to properly schedule rlwimi, and use it to efficiently codegen bitfield operations. llvm-svn: 17068
* Fix fix fixChris Lattner2004-10-161-1/+1
| | | | llvm-svn: 17057
* Add support for undef and unreachableChris Lattner2004-10-163-8/+29
| | | | llvm-svn: 17051
* ADd support for undef and unreachableChris Lattner2004-10-161-4/+8
| | | | llvm-svn: 17050
* Teach the X86 backend about unreachable and undef. Among other things, weChris Lattner2004-10-161-1/+15
| | | | | | | | now compile: 'foo() {}' into "ret" instead of "mov EAX, 0; ret" llvm-svn: 17049
* Add support for unreachable and undefChris Lattner2004-10-161-2/+10
| | | | llvm-svn: 17048
* Add a missing dependencyChris Lattner2004-10-161-1/+1
| | | | llvm-svn: 17031
* Fix file headerChris Lattner2004-10-161-1/+1
| | | | llvm-svn: 17030
* Instruction select globals with offsets better. For example, on this testChris Lattner2004-10-151-7/+17
| | | | | | | | | | | | | | | | | | | | | | | | | | | | case: int C[100]; int foo() { return C[4]; } We now codegen: foo: mov %EAX, DWORD PTR [C + 16] ret instead of: foo: mov %EAX, OFFSET C mov %EAX, DWORD PTR [%EAX + 16] ret Other impressive features may be coming later. This patch is contributed by Jeff Cohen! llvm-svn: 17011
* Give the X86 JIT the ability to encode global+disp constants. PatchChris Lattner2004-10-151-27/+54
| | | | | | contributed by Jeff Cohen! llvm-svn: 17010
* Give the X86 asm printer the ability to print out addressing modes that haveChris Lattner2004-10-151-25/+53
| | | | | | constant displacements from global variables. Patch by Jeff Cohen! llvm-svn: 17009
* Allow X86 addressing modes to represent globals with offsets. Patch contributedChris Lattner2004-10-151-5/+10
| | | | | | by Jeff Cohen! llvm-svn: 17008
* Better codegen of binary integer ops with 32 bit immediate operands.Nate Begeman2004-10-151-2/+22
| | | | | | | | | | | | | | | | | | | | This transformation fires a few dozen times across the testsuite. For example, int test2(int X) { return X ^ 0x0FF00FF0; } Old: _test2: lis r2, 4080 ori r2, r2, 4080 xor r3, r3, r2 blr New: _test2: xoris r3, r3, 4080 xori r3, r3, 4080 blr llvm-svn: 17004
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