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* A few more small things I've run into.Eli Friedman2008-02-281-3/+86
| | | | llvm-svn: 47702
* EHPreferredDataFormat hook for PPC targets. Looks like DarwinAnton Korobeynikov2008-02-272-1/+30
| | | | | | uses the same encoding everywhere. Linux FIXME'ed. llvm-svn: 47701
* Preparation step for some cleanup/generalization in EH information emission:Anton Korobeynikov2008-02-273-1/+74
| | | | | | provide TAI hook for selection of EH data emission format. Currently unused. llvm-svn: 47699
* Don't hard-code the mask size to be 32, which is incorrect on ppc64Dan Gohman2008-02-271-3/+5
| | | | | | | and was causing aborts with the new APInt changes. This may also be fixing an obscure ppc64 bug. llvm-svn: 47692
* This is done.Evan Cheng2008-02-271-24/+0
| | | | llvm-svn: 47688
* Final de-tabification.Bill Wendling2008-02-277-110/+109
| | | | llvm-svn: 47663
* Make X86TargetLowering::LowerSINT_TO_FP return without creating a dead Chris Lattner2008-02-272-29/+12
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | stack slot and store if the SINT_TO_FP is actually legal. This allows us to compile: double a(double b) {return (unsigned)b;} to: _a: cvttsd2siq %xmm0, %rax movl %eax, %eax cvtsi2sdq %rax, %xmm0 ret instead of: _a: subq $8, %rsp cvttsd2siq %xmm0, %rax movl %eax, %eax cvtsi2sdq %rax, %xmm0 addq $8, %rsp ret crazy. llvm-svn: 47660
* this code is correct but strange looking ;-)Chris Lattner2008-02-271-2/+1
| | | | llvm-svn: 47659
* Compile x86-64-and-mask.ll into:Chris Lattner2008-02-272-10/+14
| | | | | | | | | | | | | | | | | | | | _test: movl %edi, %eax ret instead of: _test: movl $4294967295, %ecx movq %rdi, %rax andq %rcx, %rax ret It would be great to write this as a Pat pattern that used subregs instead of a 'pseudo' instruction, but I don't know how to do that in td files. llvm-svn: 47658
* Spiller now remove unused spill slots.Evan Cheng2008-02-271-0/+2
| | | | llvm-svn: 47657
* Convert the last remaining users of the non-APInt form ofDan Gohman2008-02-272-16/+24
| | | | | | | ComputeMaskedBits to use the APInt form, and remove the non-APInt form. llvm-svn: 47654
* add a noteChris Lattner2008-02-271-0/+27
| | | | llvm-svn: 47652
* Refactor according to Evan's and Anton's suggestions.Arnold Schwaighofer2008-02-262-10/+27
| | | | llvm-svn: 47635
* Rename PrintableName to Name.Bill Wendling2008-02-263-3/+3
| | | | llvm-svn: 47629
* Change "Name" to "AsmName" in the target register info. Gee, a refactoring toolBill Wendling2008-02-2613-37/+37
| | | | | | would have been a Godsend here! llvm-svn: 47625
* Correct function comments.Arnold Schwaighofer2008-02-261-19/+23
| | | | llvm-svn: 47606
* De-tabifyBill Wendling2008-02-263-6/+4
| | | | llvm-svn: 47600
* Add support for intermodule tail calls on x86/32bit withArnold Schwaighofer2008-02-261-12/+24
| | | | | | | | GOT-style position independent code. Before only tail calls to protected/hidden functions within the same module were optimized. Now all function calls are tail call optimized. llvm-svn: 47594
* Change the lowering of arguments for tail call optimizedArnold Schwaighofer2008-02-262-42/+84
| | | | | | | | | | | | calls. Before arguments that could overwrite each other were explicitly lowered to a stack slot, not giving the register allocator a chance to optimize. Now a sequence of copyto/copyfrom virtual registers ensures that arguments are loaded in (virtual) registers before they are lowered to the stack slot (and might overwrite each other). Also parameter stack slots are marked mutable for (potentially) tail calling functions. llvm-svn: 47593
* Revert the assert for MUL_LOHI with an unused high result; ChrisDan Gohman2008-02-251-3/+0
| | | | | | pointed out that this isn't correct at -O0. llvm-svn: 47575
* Revise previous patch per review.Dale Johannesen2008-02-251-4/+3
| | | | llvm-svn: 47573
* Add an assert to verify that we don't see anDan Gohman2008-02-251-0/+3
| | | | | | {S,U}MUL_LOHI with an unused high value. llvm-svn: 47569
* Remove the hack that turned an {S,U}MUL_LOHI with an unused highDan Gohman2008-02-251-9/+0
| | | | | | | | result into a MUL late in the X86 codegen process. ISD::MUL is once again Legal on X86, so this is no longer needed. And, the hack was suboptimal; see PR1874 for details. llvm-svn: 47567
* Convert MaskedValueIsZero and all its users to use APInt. Also addDan Gohman2008-02-252-2/+4
| | | | | | a SignBitIsZero function to simplify a common use case. llvm-svn: 47561
* Expand removal of MMX memory copies to allow 1 levelDale Johannesen2008-02-251-39/+75
| | | | | | of TokenFactor underneath chain (seems to be enough) llvm-svn: 47554
* Some platforms use the same name for 32-bit and 64-bit registers (likeBill Wendling2008-02-242-34/+36
| | | | | | | | | %r3 on PPC) in their ASM files. However, it's hard for humans to read during debugging. Adding a new field to the register data that lets you specify a different name to be printed than the one that goes into the ASM file -- %x3 instead of %r3, for instance. llvm-svn: 47534
* Merge current work back to tree to minimize diffs and drift. Major highlightsScott Michel2008-02-239-993/+1903
| | | | | | | | | | | | | | for CellSPU modifications: - SPUInstrInfo.td refactoring: "multiclass" really is _your_ friend. - Other improvements based on refactoring effort in SPUISelLowering.cpp, esp. in SPUISelLowering::PerformDAGCombine(), where zero amount shifts and rotates are now eliminiated, other scalar-to-vector-to-scalar silliness is also eliminated. - 64-bit operations are being implemented, _muldi3.c gcc runtime now compiles and generates the right code. More work still needs to be done. llvm-svn: 47532
* Turning on remat of pic loads.Evan Cheng2008-02-231-1/+1
| | | | llvm-svn: 47524
* No need recognize load from a fixed argument slot as re-materializable. ↵Evan Cheng2008-02-231-12/+0
| | | | | | LiveIntervalAnalysis already handles it as a special case. llvm-svn: 47522
* Split ParameterAttributes.h, putting the complicatedDale Johannesen2008-02-222-2/+2
| | | | | | | stuff into ParamAttrsList.h. Per feedback from ParamAttrs changes. llvm-svn: 47504
* MMX vectors are passed 4-byte aligned.Dale Johannesen2008-02-221-4/+4
| | | | llvm-svn: 47483
* Allow re-materialization of pic load (controlled by -remat-pic-load for now).Evan Cheng2008-02-221-3/+23
| | | | llvm-svn: 47476
* copy mmx values from/to memory with GPRs on x86-32 Chris Lattner2008-02-221-1/+25
| | | | | | | | instead of with mmx registers. This horribleness is apparently done by gcc to avoid having to insert emms in places that really should have it. This is the second half of rdar://5741668. llvm-svn: 47474
* Start using GPR's to copy around mmx value instead of mmx regs.Chris Lattner2008-02-221-0/+32
| | | | | | | | | | GCC apparently does this, and code depends on not having to do emms when this happens. This is x86-64 only so far, second half should handle x86-32. rdar://5741668 llvm-svn: 47470
* A few minor updates, removing implemented stuff and adding a couple of Eli Friedman2008-02-211-83/+110
| | | | | | new things. llvm-svn: 47458
* Dan implemented one multiply issue. Replace it with another. :)Chris Lattner2008-02-211-12/+33
| | | | llvm-svn: 47431
* Atomic op support. If any gcc test uses __sync builtins, it might start ↵Andrew Lenharth2008-02-215-6/+225
| | | | | | failing on archs that haven't implemented them yet llvm-svn: 47430
* Poorly named option.Evan Cheng2008-02-202-3/+4
| | | | llvm-svn: 47400
* Temporarily backing out r47337. It breaks a number of CBE tests.Evan Cheng2008-02-201-5/+7
| | | | llvm-svn: 47385
* Fix newly-introduced 4.3 warningsAnton Korobeynikov2008-02-204-9/+10
| | | | llvm-svn: 47375
* Fix code styleAnton Korobeynikov2008-02-201-17/+15
| | | | llvm-svn: 47370
* Remove bunch of gcc 4.3-related warnings from TargetAnton Korobeynikov2008-02-2013-24/+31
| | | | llvm-svn: 47369
* Unbreak build with gcc 4.3: provide missed includes and silence most ↵Anton Korobeynikov2008-02-202-0/+2
| | | | | | annoying warnings. llvm-svn: 47367
* Disable for now. This is pessimizing code.Evan Cheng2008-02-201-1/+1
| | | | llvm-svn: 47354
* Add hidden option -x86-fold-and-in-test to test the effect the test / and ↵Evan Cheng2008-02-192-1/+7
| | | | | | folding change. llvm-svn: 47351
* fix some byval problems in the cbe. Closes PR2065Andrew Lenharth2008-02-191-7/+5
| | | | llvm-svn: 47337
* Don't fold and's into test instructions if they have multiple uses.Chris Lattner2008-02-191-6/+12
| | | | | | | | | | | | | | | | | | | | | | | | This compiles test-nofold.ll into: _test: movl $15, %ecx andl 4(%esp), %ecx testl %ecx, %ecx movl $42, %eax cmove %ecx, %eax ret instead of: _test: movl 4(%esp), %eax movl %eax, %ecx andl $15, %ecx testl $15, %eax movl $42, %eax cmove %ecx, %eax ret llvm-svn: 47330
* Me not like duplicated comments.Evan Cheng2008-02-191-4/+4
| | | | llvm-svn: 47300
* - When DAG combiner is folding a bit convert into a BUILD_VECTOR, it should ↵Evan Cheng2008-02-184-55/+78
| | | | | | | | check if it's essentially a SCALAR_TO_VECTOR. Avoid turning (v8i16) <10, u, u, u> to <10, 0, u, u, u, u, u, u>. Instead, simply convert it to a SCALAR_TO_VECTOR of the proper type. - X86 now normalize SCALAR_TO_VECTOR to (BIT_CONVERT (v4i32 SCALAR_TO_VECTOR)). Get rid of X86ISD::S2VEC. llvm-svn: 47290
* Chris pointed out that it's not necessary to set i64 MUL to ExpandDan Gohman2008-02-181-12/+10
| | | | | | | on x86-32 since i64 itself is not a Legal type. And, update some comments. llvm-svn: 47282
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