| Commit message (Collapse) | Author | Age | Files | Lines | |
|---|---|---|---|---|---|
| * | Fix typo in MipsMCTargetDesc.h; Patch supplied by Liu (proljc@gmail.com) | James Molloy | 2011-08-30 | 1 | -4/+4 |
| | | | | | llvm-svn: 138796 | ||||
| * | Change ARM / Thumb2 addc / adde and subc / sube modeling to use physical | Evan Cheng | 2011-08-30 | 7 | -346/+358 |
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | register dependency (rather than glue them together). This is general goodness as it gives scheduler more freedom. However it is motivated by a nasty bug in isel. When a i64 sub is expanded to subc + sube. libcall #1 \ \ subc \ / \ \ / \ \ / libcall #2 sube If the libcalls are not serialized (i.e. both have chains which are dag entry), legalizer can serialize them in arbitrary orders. If it's unlucky, it can force libcall #2 before libcall #1 in the above case. subc | libcall #2 | libcall #1 | sube However since subc and sube are "glued" together, this ends up being a cycle when the scheduler combine subc and sube as a single scheduling unit. The right solution is to fix LegalizeType too chains the libcalls together. However, LegalizeType is not processing nodes in order so that's harder than it should be. For now, the move to physical register dependency will do. rdar://10019576 llvm-svn: 138791 | ||||
| * | Revert 138781. It's not playing nicely with the immediate forms for ADC. | Jim Grosbach | 2011-08-29 | 1 | -20/+0 |
| | | | | | llvm-svn: 138782 | ||||
| * | Thumb2 assembler aliases for ADC/SBC w/o the .w suffix. | Jim Grosbach | 2011-08-29 | 1 | -0/+20 |
| | | | | | llvm-svn: 138781 | ||||
| * | Add missing encoding information for some of the GPR<->FP register moves. | Owen Anderson | 2011-08-29 | 1 | -2/+23 |
| | | | | | llvm-svn: 138780 | ||||
| * | Thumb2 parsing and encoding for IT blocks. | Jim Grosbach | 2011-08-29 | 1 | -23/+104 |
| | | | | | llvm-svn: 138773 | ||||
| * | Explicitly zero out parts of a vector which are required to be zero by the ↵ | Eli Friedman | 2011-08-29 | 1 | -0/+3 |
| | | | | | | | algorithm in LowerUINT_TO_FP_i32. This only has a substantial effect on the generated code when the input is extracted from a vector register; other ways of loading an i32 do the appropriate zeroing implicitly. Fixes PR10802. llvm-svn: 138768 | ||||
| * | Apply the same fix for the change in LDR_PRE_IMM/LDRB_PRE_IMM operand ↵ | Owen Anderson | 2011-08-29 | 1 | -1/+2 |
| | | | | | | | encodings to the load-store optimizer that I applied to the instruction selector in r138758. Fixes ary3 from the nightly test suite. llvm-svn: 138766 | ||||
| * | Specify an additional fixed bit in the PLD/PLDW/PLI register-register encoding. | Owen Anderson | 2011-08-29 | 1 | -0/+1 |
| | | | | | llvm-svn: 138760 | ||||
| * | addrmode_imm12 and addrmode2_offset encode their immediate values ↵ | Owen Anderson | 2011-08-29 | 1 | -4/+28 |
| | | | | | | | differently. Update the manual instruction selection code that was encoding them the addrmode2 way even though LDR_PRE_IMM/LDRB_PRE_IMM had switched to addrmode_imm12. Should fix a number of nightly test failures. llvm-svn: 138758 | ||||
| * | Improve handling of #-0 offsets for many more pre-indexed addressing modes. | Owen Anderson | 2011-08-29 | 3 | -6/+15 |
| | | | | | llvm-svn: 138754 | ||||
| * | Expand ATOMIC_LOAD and ATOMIC_STORE for architectures I don't know well ↵ | Eli Friedman | 2011-08-29 | 4 | -0/+10 |
| | | | | | | | enough to fix properly. llvm-svn: 138751 | ||||
| * | Update the load-store optimizer for changes to the operands on LDR_PRE_IMM ↵ | Owen Anderson | 2011-08-29 | 1 | -4/+10 |
| | | | | | | | and LDRB_PRE_IMM in r138653. llvm-svn: 138746 | ||||
| * | Move non-intruction patterns to a more appropriate place! | Bruno Cardoso Lopes | 2011-08-29 | 1 | -31/+33 |
| | | | | | llvm-svn: 138744 | ||||
| * | Add support for parsing #-0 on non-memory-operand immediate values, and add ↵ | Owen Anderson | 2011-08-29 | 1 | -2/+13 |
| | | | | | | | a testcase that necessitates it. llvm-svn: 138739 | ||||
| * | Remove premature previous commit. | Nicolas Geoffray | 2011-08-28 | 1 | -25/+7 |
| | | | | | llvm-svn: 138725 | ||||
| * | Encoding of instructions referencing segments has changed. Do what ↵ | Nicolas Geoffray | 2011-08-28 | 1 | -7/+25 |
| | | | | | | | X86MCCodeEmitter does. llvm-svn: 138723 | ||||
| * | Silence GCC warnings and make an array const. | Benjamin Kramer | 2011-08-27 | 2 | -7/+6 |
| | | | | | llvm-svn: 138706 | ||||
| * | Improve encoding support for BLX with immediat eoperands, and fix a BLX ↵ | Owen Anderson | 2011-08-26 | 4 | -12/+25 |
| | | | | | | | decoding bug this uncovered. llvm-svn: 138675 | ||||
| * | Correct encoding of BL with immediate offset. | Owen Anderson | 2011-08-26 | 1 | -5/+10 |
| | | | | | llvm-svn: 138673 | ||||
| * | ARM assembly parsing tweak for pldw. | Jim Grosbach | 2011-08-26 | 1 | -3/+4 |
| | | | | | llvm-svn: 138669 | ||||
| * | Spelling fail. | Owen Anderson | 2011-08-26 | 1 | -1/+1 |
| | | | | | llvm-svn: 138667 | ||||
| * | Thumb2 assembler parsing and encoding of IT instruction. | Jim Grosbach | 2011-08-26 | 2 | -12/+136 |
| | | | | | | | | | This handles only the handling of the IT instruction itself, not the processing and validation of the instructions in the IT block. That's next, and will include encoding tests for IT itself. llvm-svn: 138665 | ||||
| * | Add support for generating CMPXCHG16B on x86-64 for the cmpxchg IR instruction. | Eli Friedman | 2011-08-26 | 7 | -48/+94 |
| | | | | | llvm-svn: 138660 | ||||
| * | Fix ARM codegen breakage caused by r138653. | Owen Anderson | 2011-08-26 | 1 | -6/+15 |
| | | | | | llvm-svn: 138657 | ||||
| * | invalid-LDR_PRE-arm.txt was already passing, but for the wrong reasons. We ↵ | Owen Anderson | 2011-08-26 | 6 | -19/+96 |
| | | | | | | | were failing to specify enough fixed bits of LDR_PRE/LDRB_PRE, resulting in decoding conflicts. Separate them into immediate vs. register versions, allowing us to specify the necessary fixed bits. This in turn results in the test being decoded properly, and being rejected as UNPREDICTABLE rather than a hard failure. llvm-svn: 138653 | ||||
| * | Update for feedback from Jim. | Owen Anderson | 2011-08-26 | 1 | -3/+3 |
| | | | | | llvm-svn: 138642 | ||||
| * | ARMDisassembler: Always return a size, even when disassembling fails. | Benjamin Kramer | 2011-08-26 | 1 | -3/+11 |
| | | | | | | | This should fix PR10772. llvm-svn: 138636 | ||||
| * | Support an extension of ARM asm syntax to allow immediate operands to ADR ↵ | Owen Anderson | 2011-08-26 | 3 | -17/+36 |
| | | | | | | | instructions. This is helpful for disassembler testing, and indeed exposed a disassembler bug that is also fixed here. llvm-svn: 138635 | ||||
| * | Don't insert branch hint lables that are never used. | Kalle Raiskila | 2011-08-26 | 2 | -23/+0 |
| | | | | | llvm-svn: 138630 | ||||
| * | Fix PR10755 by checking for invalid predicate codes from UNPREDICTABLE t2IT ↵ | Owen Anderson | 2011-08-26 | 1 | -0/+2 |
| | | | | | | | | | instructions when decoding their successors. This is the last disassembly crash detected by exhaustive Thumb2 instruction space. Major thanks to Chandler Carruth for making this kind of exhaustive testing possible. llvm-svn: 138625 | ||||
| * | Fix disassembling of VCVTSD2SI | Craig Topper | 2011-08-26 | 1 | -10/+4 |
| | | | | | llvm-svn: 138623 | ||||
| * | Atomic load/store on ARM/Thumb. | Eli Friedman | 2011-08-26 | 3 | -0/+63 |
| | | | | | | | | | | | | | I don't really like the patterns, but I'm having trouble coming up with a better way to handle them. I plan on making other targets use the same legalization ARM-without-memory-barriers is using... it's not especially efficient, but if anyone cares, it's not that hard to fix for a given target if there's some better lowering. llvm-svn: 138621 | ||||
| * | Do the same as r138461. Mark VZEROALL as clobbering all YMM registers | Bruno Cardoso Lopes | 2011-08-25 | 1 | -4/+3 |
| | | | | | llvm-svn: 138592 | ||||
| * | Remove stray fullstop. | Nick Lewycky | 2011-08-25 | 1 | -1/+1 |
| | | | | | llvm-svn: 138589 | ||||
| * | Add support for AVX 256-bit version of MOVDDUP! | Bruno Cardoso Lopes | 2011-08-25 | 2 | -0/+47 |
| | | | | | llvm-svn: 138588 | ||||
| * | Make isMOVDDUP mask check more strict and update comments! | Bruno Cardoso Lopes | 2011-08-25 | 1 | -2/+7 |
| | | | | | llvm-svn: 138587 | ||||
| * | Port over additional encoding tests to decoding tests, and fix an operand ↵ | Owen Anderson | 2011-08-25 | 1 | -1/+1 |
| | | | | | | | ordering bug this exposed. llvm-svn: 138575 | ||||
| * | ARM fix for missing implicit operands on ldmia_ret. | Andrew Trick | 2011-08-25 | 1 | -1/+3 |
| | | | | | | | rdar://10005094: miscompile of 176.gcc llvm-svn: 138568 | ||||
| * | whitespace | Andrew Trick | 2011-08-25 | 1 | -1/+1 |
| | | | | | llvm-svn: 138566 | ||||
| * | Explicitly disallow predication in Thumb1 assembly. | Jim Grosbach | 2011-08-25 | 1 | -0/+6 |
| | | | | | llvm-svn: 138562 | ||||
| * | Add more missing TB encodings to VEX instructions to allow them to be ↵ | Craig Topper | 2011-08-25 | 1 | -36/+36 |
| | | | | | | | disassembled. Fixes remainder of PR10678. llvm-svn: 138553 | ||||
| * | Add TB encoding to VEROALL, VZEROUPPER, and VCVTPS2PD to allow them to be ↵ | Craig Topper | 2011-08-25 | 1 | -8/+8 |
| | | | | | | | disassembled. Fixes PR10723. llvm-svn: 138551 | ||||
| * | Add support for 256-bit versions of VSHUFPD and VSHUFPS. | Bruno Cardoso Lopes | 2011-08-25 | 2 | -18/+204 |
| | | | | | llvm-svn: 138546 | ||||
| * | Add memory version of SHUFPD to mask decoding! | Bruno Cardoso Lopes | 2011-08-25 | 1 | -1/+3 |
| | | | | | llvm-svn: 138545 | ||||
| * | Hide -global-merge option. | Evan Cheng | 2011-08-25 | 1 | -1/+1 |
| | | | | | llvm-svn: 138540 | ||||
| * | Add a command line option to disable global merge pass. | Evan Cheng | 2011-08-25 | 1 | -1/+6 |
| | | | | | llvm-svn: 138536 | ||||
| * | Remove a out-of-place comment. | Evan Cheng | 2011-08-25 | 1 | -1/+0 |
| | | | | | llvm-svn: 138534 | ||||
| * | Create a section for non-instructions patterns in the beginning of the | Bruno Cardoso Lopes | 2011-08-24 | 1 | -88/+82 |
| | | | | | | | file, and move more code around! llvm-svn: 138521 | ||||
| * | Move code around! | Bruno Cardoso Lopes | 2011-08-24 | 1 | -58/+66 |
| | | | | | llvm-svn: 138520 | ||||
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