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* Simplify the encoding of reg+/-imm12 values that allow PC-relative encoding. ↵Owen Anderson2010-11-304-88/+16
| | | | | | | | | This allows the Thumb2 encoding to share code with the ARM encoding, which gets use fixup support for free. It also allows us to fold away at least one codegen-only pattern. llvm-svn: 120481
* Fix handling of ARM negative pc-relative fixups for loads and stores.Jim Grosbach2010-11-302-9/+36
| | | | llvm-svn: 120480
* Move X86InstrFPStack.td over to PseudoI as well.Eric Christopher2010-11-301-27/+9
| | | | llvm-svn: 120470
* Migrate X86InstrControl.td to use PseudoI and fix a couple of 80-col violationsEric Christopher2010-11-301-19/+15
| | | | | | while I'm in there. llvm-svn: 120466
* Provide Thumb2 encodings for a few miscellaneous instructions.Owen Anderson2010-11-301-8/+22
| | | | llvm-svn: 120455
* Add FIXMEJim Grosbach2010-11-301-0/+1
| | | | llvm-svn: 120451
* Add encoding support for Thumb2 PLD and PLI instructions.Owen Anderson2010-11-303-1/+43
| | | | llvm-svn: 120449
* Noticed this on inspection, fix and update some comments.Eric Christopher2010-11-301-3/+4
| | | | llvm-svn: 120447
* Pseudo-ize ARM MOVPCRXJim Grosbach2010-11-302-8/+19
| | | | llvm-svn: 120442
* Provide encodings for a few more load/store variants.Owen Anderson2010-11-301-4/+16
| | | | llvm-svn: 120439
* Pseudo-ize BX_CALL and friends. Remove dead instruction format classes.Jim Grosbach2010-11-303-46/+66
| | | | | | rdar://8685712 llvm-svn: 120438
* ptx: add command-line options for gpu target and ptx versionChe-Liang Chiou2010-11-301-0/+18
| | | | llvm-svn: 120423
* Fix some grammar in comments I noticed.Eric Christopher2010-11-301-5/+5
| | | | llvm-svn: 120416
* This defaults to GenericDomain.Eric Christopher2010-11-301-1/+1
| | | | llvm-svn: 120415
* Implement a PseudoI class and transfer the sse instructions over to useEric Christopher2010-11-302-12/+15
| | | | | | it. llvm-svn: 120412
* Fix insertion point in pcmp expander.Eric Christopher2010-11-301-9/+2
| | | | | | While I'm there, clean up too many \n even for me. llvm-svn: 120411
* Fix some cleanups from my last patch.Eric Christopher2010-11-302-5/+5
| | | | llvm-svn: 120410
* Add parsing for the Thumb t_addrmode_s4 addressing mode. This can almostBill Wendling2010-11-304-14/+89
| | | | | | | | | | certainly be made more generic. But it does allow us to parse something like: ldr r3, [r2, r4] correctly in Thumb mode. llvm-svn: 120408
* ptx: add ld instructionChe-Liang Chiou2010-11-303-9/+118
| | | | | | | support register and register-immediate addressing mode todo: immediate and register-register addressing mode llvm-svn: 120407
* Rewrite mwait and monitor support and custom lower arguments.Eric Christopher2010-11-303-4/+75
| | | | | | Fixes PR8573. llvm-svn: 120404
* Minor cleanups. No functional change.Bill Wendling2010-11-301-24/+23
| | | | llvm-svn: 120372
* s/ARM::BRIND/ARM::BX/g to coincide with r120366.Bill Wendling2010-11-303-5/+5
| | | | llvm-svn: 120371
* Add correct encoding for "bl __aeabi_read_tp". However, the asm matcher isn'tBill Wendling2010-11-301-3/+5
| | | | | | able to match this yet. llvm-svn: 120369
* Rename BX/BRIND/etc patterns to clarify which is actually the BX instructionJim Grosbach2010-11-302-9/+9
| | | | | | and which are pseudos. llvm-svn: 120366
* Add some encoding for the adr instruction. Labels still need to be finished.Bill Wendling2010-11-301-6/+16
| | | | llvm-svn: 120365
* Correct Thumb2 encodings for a much wider range of loads and stores.Owen Anderson2010-11-304-48/+96
| | | | llvm-svn: 120364
* Make a few more ARM pseudo instructions actually use the PseudoInst base class.Jim Grosbach2010-11-301-14/+13
| | | | llvm-svn: 120362
* Predicate encoding should be withing {}s. And general cleanup.Bill Wendling2010-11-302-8/+4
| | | | llvm-svn: 120361
* Predicate encoding should be withing {}s.Bill Wendling2010-11-301-2/+2
| | | | llvm-svn: 120360
* Fix the encoding of VLD4-dup alignment.Bob Wilson2010-11-304-37/+67
| | | | | | | | The only reasonable way I could find to do this is to provide an alternate version of the addrmode6 operand with a different encoding function. Use it for all the VLD-dup instructions for the sake of consistency. llvm-svn: 120358
* Rename VLDnDUP instructions with double-spaced registersBob Wilson2010-11-301-12/+12
| | | | | | in an attempt to make things a little more consistent. llvm-svn: 120357
* Add support for NEON VLD3-dup instructions.Bob Wilson2010-11-306-1/+104
| | | | | | The encoding for alignment in VLD4-dup instructions is still a work in progress. llvm-svn: 120356
* Simplify definitions of the ARM eh.sjlj.*jmp pseudo instructions.Jim Grosbach2010-11-291-9/+6
| | | | llvm-svn: 120354
* Parameterize ARMPseudoInst size property.Jim Grosbach2010-11-292-27/+19
| | | | llvm-svn: 120353
* Add a few missing initializers.Jim Grosbach2010-11-291-2/+2
| | | | llvm-svn: 120350
* Nuke trailing whitespace.Jim Grosbach2010-11-291-3/+3
| | | | llvm-svn: 120344
* Nuke a FIXME. No need to be fancier here, as ARM handles constant poolsJim Grosbach2010-11-291-5/+1
| | | | | | locations and formatting specially. rdar://7353441 llvm-svn: 120343
* Provide Thumb2 encodings for basic loads and stores.Owen Anderson2010-11-293-21/+136
| | | | llvm-svn: 120340
* Mark Darwin call instructions as using "r7" to prevent the frame-registerEvan Cheng2010-11-293-12/+27
| | | | | | | assignment instructions from being moved below / above calls. rdar://8690640 llvm-svn: 120339
* Nuke dead isCodeGenOnly annotation and extraneous comment.Jim Grosbach2010-11-291-3/+2
| | | | llvm-svn: 120338
* tidy up.Jim Grosbach2010-11-291-2/+1
| | | | llvm-svn: 120335
* Thumb encodings for conditional moves.Bill Wendling2010-11-291-2/+14
| | | | llvm-svn: 120334
* Pseudo-ize Thumb2 jump tables with explicit MC lowering to the rawJim Grosbach2010-11-297-154/+71
| | | | | | instructions. This simplifies instruction printing and disassembly. llvm-svn: 120333
* Refactor some of the "disassembly-only" instructions into a base class. ThisBill Wendling2010-11-291-36/+21
| | | | | | reduces some code duplication. llvm-svn: 120326
* Update fastisel for the changes in r120272.Eric Christopher2010-11-291-3/+7
| | | | llvm-svn: 120324
* Rename t2 TBB and TBH instructions to reference that they encode the jump tableJim Grosbach2010-11-295-14/+14
| | | | | | data. Next up, pseudo-izing them. llvm-svn: 120320
* Improving the factoring of several instruction encodings.Owen Anderson2010-11-291-89/+51
| | | | llvm-svn: 120317
* Add support for NEON VLD3-dup instructions.Bob Wilson2010-11-296-0/+93
| | | | llvm-svn: 120312
* Fix copy-and-paste errors in VLD2-dup scheduling itineraries.Bob Wilson2010-11-292-4/+4
| | | | llvm-svn: 120311
* ARM Pseudo-ize tBR_JTr.Jim Grosbach2010-11-295-28/+19
| | | | llvm-svn: 120310
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