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* Continue ARM indexed load refactoring. Multiclass for LDR{B} pre/post indexedJim Grosbach2010-11-131-18/+12
| | | | | | instructions. llvm-svn: 118963
* More ARM load/store indexed refactoring. Also fix an incorrect IndexModeJim Grosbach2010-11-132-75/+54
| | | | | | flag for the LDRT/STRT family instructions as a side effect. llvm-svn: 118955
* Revert r118917, which is implicated in the llvm-gcc-i386-linux-selfhost failure.Dan Gohman2010-11-131-5/+5
| | | | llvm-svn: 118954
* Fix an obvious typo which inverted an immediate.Evan Cheng2010-11-131-1/+1
| | | | llvm-svn: 118951
* 1. Adding missing immediate mode asm parser test cases.Wesley Peck2010-11-131-2/+2
| | | | | | 2. Fixing improper immediate mode reverse subtract. llvm-svn: 118948
* Temporarily revert this.Eric Christopher2010-11-121-5/+4
| | | | llvm-svn: 118946
* For pre-v6t2 targets, only select MOVi32imm if the immediate can be handled ↵Evan Cheng2010-11-123-15/+11
| | | | | | with movi + orr. llvm-svn: 118945
* Fixing improperly encoded reverse subtract instructions in MBlaze backend.Wesley Peck2010-11-122-9/+8
| | | | llvm-svn: 118943
* Revert r118939 while I work out why it broke some buildbots.Owen Anderson2010-11-121-65/+52
| | | | llvm-svn: 118942
* 1. Finishing MBlaze MC asm parser test casesWesley Peck2010-11-1211-170/+222
| | | | | | | | | | 2. Parsing .word directive in MBlaze asm parser 3. Fixing hack where memory instructions reversed order of last two parameters 4. Fixing many improperly encoded instructions 5. Support parsing special instructions (MFS,MTS,etc.) 6. Removing unused functions from inst printer llvm-svn: 118941
* Attemt to provide correct encodings for Thumb2 binary operators.Owen Anderson2010-11-121-52/+65
| | | | llvm-svn: 118939
* Eliminate ARM::MOVi2pieces. Just use MOVi32imm and expand it to either ↵Evan Cheng2010-11-125-72/+34
| | | | | | movi+orr or movw+movt depending on the subtarget. llvm-svn: 118938
* Make this happen for ARM like x86. Don't entirely bail out whenEric Christopher2010-11-121-4/+5
| | | | | | | an address is in a different block, get it into a register and go from there. llvm-svn: 118936
* Add conditional mvn instructions.Evan Cheng2010-11-123-10/+67
| | | | llvm-svn: 118935
* Zap a copy/paste-o bit of dead code.Jim Grosbach2010-11-121-2/+0
| | | | llvm-svn: 118926
* Refactor to parameterize some ARM load/store encoding patterns. PreparatoryJim Grosbach2010-11-122-86/+24
| | | | | | | to splitting the load/store pre/post indexed instructions into [r, r] and [r, imm] forms. llvm-svn: 118925
* First stab at providing correct Thumb2 encodings, start with adc.Owen Anderson2010-11-123-19/+122
| | | | llvm-svn: 118924
* Add some missing isel predicates on def : pat patterns to avoid generating ↵Evan Cheng2010-11-123-64/+54
| | | | | | VFP vmla / vmls (they cause stalls). Disabling them in isel is properly not a right solution, I'll look into a proper solution next. llvm-svn: 118922
* Kill more unused stuff.Jim Grosbach2010-11-121-43/+0
| | | | llvm-svn: 118921
* Remove unused class.Jim Grosbach2010-11-121-8/+0
| | | | llvm-svn: 118919
* When the definition of an address value is in a different blockDan Gohman2010-11-121-5/+5
| | | | | | | | from the user of the address, fall back to just using the address in a register instead of bailing out of fast-isel altogether. llvm-svn: 118917
* accept lret as an alias for lretl, fixing the reopened part of PR8592Chris Lattner2010-11-122-2/+5
| | | | llvm-svn: 118916
* Fill in the default predication bits for ARM unconditional branch.Jim Grosbach2010-11-121-0/+1
| | | | llvm-svn: 118907
* Encoding for ARM LDRSB instructions.Jim Grosbach2010-11-121-7/+12
| | | | llvm-svn: 118905
* implement PR8592: empirically "lretq" is a "lret" with a rex.w prefix.Chris Lattner2010-11-121-0/+2
| | | | llvm-svn: 118903
* tidy up.Chris Lattner2010-11-121-3/+2
| | | | llvm-svn: 118896
* Fix memory access lowering on SPU, addingKalle Raiskila2010-11-124-115/+252
| | | | | | | | | | | | support for the case where alignment<value size. These cases were silently miscompiled before this patch. Now they are overly verbose -especially storing is- and any front-end should still avoid misaligned memory accesses as much as possible. The bit juggling algorithm added here probably has some room for improvement still. llvm-svn: 118889
* Fix up a few more spots of addrmode2 (or not) changes that wereEric Christopher2010-11-121-6/+12
| | | | | | | | missed. Update some comments accordingly. Fixes rdar://8652289 llvm-svn: 118888
* Remove possibly useful info from comment, per Chris.Dale Johannesen2010-11-121-1/+1
| | | | llvm-svn: 118865
* Enable mips32 mul instruction. Patch by Akira Hatanaka <ahatanaka@mips.com>Bruno Cardoso Lopes2010-11-123-3/+6
| | | | llvm-svn: 118864
* Start of support for binary emit of 16-it Thumb instructions.Jim Grosbach2010-11-112-7/+18
| | | | llvm-svn: 118859
* Fill out support for Thumb2 encodings of NEON instructions.Owen Anderson2010-11-113-0/+21
| | | | llvm-svn: 118854
* The BRK instruction in the MicroBlaze is a branch-and-link.Wesley Peck2010-11-111-2/+2
| | | | llvm-svn: 118848
* Fix tblgen instruction errors exposed by MC asm parser testsWesley Peck2010-11-112-30/+29
| | | | | | | Fix minimum 16-bit signed value error exposed by MC asm parser tests Add initial MC asm parser tests for the MBlaze backend llvm-svn: 118844
* Add correct Thumb2 encodings for NEON vst[1,2,3,4] and vld[1,2,3,4].Owen Anderson2010-11-113-1/+22
| | | | llvm-svn: 118843
* Revert the accidental commit I made reverting the previous commit.Eric Christopher2010-11-111-6/+7
| | | | llvm-svn: 118835
* ARM fixup encoding for direct call instructions (BL).Jim Grosbach2010-11-111-8/+22
| | | | llvm-svn: 118829
* Revert this temporarily.Eric Christopher2010-11-115-104/+31
| | | | llvm-svn: 118827
* Change the prologue and epilogue to use push/pop for the low ARM registers.Eric Christopher2010-11-114-25/+97
| | | | llvm-svn: 118823
* Add support for Thumb2 encodings of NEON data processing instructions, using ↵Owen Anderson2010-11-113-0/+26
| | | | | | | | the new PostEncoderMethod infrastructure. More tests to come. llvm-svn: 118819
* Fixed some bugs in MBlaze asm parser that were introduced when removing ↵Wesley Peck2010-11-111-5/+5
| | | | | | OwningPtrs from the code. llvm-svn: 118807
* add a noteChris Lattner2010-11-111-0/+28
| | | | llvm-svn: 118806
* Encoding of destination fixup for ARM branch and conditional branchJim Grosbach2010-11-115-13/+57
| | | | | | instructions. llvm-svn: 118801
* add pr#Chris Lattner2010-11-111-0/+1
| | | | llvm-svn: 118797
* Encoding for ARM LDRSH_POST.Jim Grosbach2010-11-114-7/+39
| | | | llvm-svn: 118794
* Remove some explicit arguments to getELFSection. This isRafael Espindola2010-11-113-8/+8
| | | | | | a leftover from the removal of isExplicit. llvm-svn: 118774
* Encoding for ARM LDRSH and LDRSH_PRE. Cannonicalize operand names.Jim Grosbach2010-11-112-39/+49
| | | | llvm-svn: 118767
* Fix encoding of Ra register for ARM smla* instructions.Jim Grosbach2010-11-111-6/+6
| | | | llvm-svn: 118761
* ARM STRH encoding information.Jim Grosbach2010-11-114-11/+44
| | | | llvm-svn: 118757
* Move LDM predicate operand encoding into base clase. Add STM missing STMJim Grosbach2010-11-102-10/+18
| | | | | | encoding bits. llvm-svn: 118738
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