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* VP{MAX, MIN} are of IIC_VSUBi4D itin class as well.Anton Korobeynikov2010-04-071-10/+35
| | | | llvm-svn: 100653
* VHADD differs from VHSUB at least on A9 - the former reads both operands in ↵Anton Korobeynikov2010-04-073-17/+71
| | | | | | the second cycle, while the latter reads second operand in first cycle. Introduce new itin classes to catch this behavior. Whether this is true for A8 as well is WIP. llvm-svn: 100652
* Some easy NEON scheduling goodness for A9Anton Korobeynikov2010-04-071-1/+53
| | | | llvm-svn: 100651
* Define new itin classes for ARM <-> VFP reg moves to distinguish from NEON ↵Anton Korobeynikov2010-04-073-7/+38
| | | | | | ops. Define proper scheduling itinerary for them on A9. A8 TRM does not specify latency for them at all :( llvm-svn: 100650
* FCONST{S,D} behaves the same way as FP unary instructions. This is true for ↵Anton Korobeynikov2010-04-071-2/+2
| | | | | | both A8 and A9. llvm-svn: 100649
* Proper cycle times for locks, since wbck latency can be larger than fwd latency.Anton Korobeynikov2010-04-071-52/+57
| | | | llvm-svn: 100648
* Add new itin classes for FP16 <-> FP32 conversions and make uise of them for A9.Anton Korobeynikov2010-04-073-4/+20
| | | | llvm-svn: 100647
* Make use of new reserved/required scheduling stuff: introduce VFP and NEON ↵Anton Korobeynikov2010-04-072-22/+77
| | | | | | locks to model domain cross stalls precisly. llvm-svn: 100646
* Some bits of A9 scheduling: VFPAnton Korobeynikov2010-04-072-1/+102
| | | | llvm-svn: 100643
* Separate const from non-const stuff during mergeingAnton Korobeynikov2010-04-071-21/+35
| | | | llvm-svn: 100642
* Some initial version of global mergerAnton Korobeynikov2010-04-074-1/+144
| | | | llvm-svn: 100641
* Fix memory leaks for external symbol name strings.Sanjiv Gupta2010-04-073-20/+38
| | | | llvm-svn: 100601
* Clean up some signedness oddities in this code noticed by clang.John McCall2010-04-071-5/+6
| | | | llvm-svn: 100599
* Move printing of target-indepedent DEBUG_VALUE commentsDale Johannesen2010-04-071-48/+10
| | | | | | | into AsmPrinter. Target-dependent form is still generated by FastISel and still handled in X86 code. llvm-svn: 100596
* Fix a number of clang -Wsign-compare warnings that didn't have an obviousJohn McCall2010-04-063-3/+3
| | | | | | | solution. The only reason these don't fire with gcc-4.2 is that gcc turns off part of -Wsign-compare in C++ on accident. llvm-svn: 100581
* Revert 100573, it's causing some testsuite problems.Dale Johannesen2010-04-061-1/+67
| | | | llvm-svn: 100578
* Move printing of DEBUG_VALUE comments to target-independent place.Dale Johannesen2010-04-061-67/+1
| | | | | | There is probably a more elegant way to do this. llvm-svn: 100573
* Expand SELECT and SELECT_CC for NEON vector types.Bob Wilson2010-04-061-0/+2
| | | | | | Radar 7770501. llvm-svn: 100568
* Fix PR6696 and PR6663Jim Grosbach2010-04-065-14/+84
| | | | | | | | | | | | | | | | | When a frame pointer is not otherwise required, and dynamic stack alignment is necessary solely due to the spilling of a register with larger alignment requirements than the default stack alignment, the frame pointer can be both used as a general purpose register and a frame pointer. That goes poorly, for obvious reasons. This patch brings back a bit of old logic for identifying the use of such registers and conservatively reserves the frame pointer during register allocation in such cases. For now, implement for X86 only since it's 32-bit linux which is hitting this, and we want a targeted fix for 2.7. As a follow-on, this will be expanded to handle other targets, as theoretically the problem could arise elsewhere as well. llvm-svn: 100559
* Don't try to collapse DomainValues onto an incompatible SSE domain.Jakob Stoklund Olesen2010-04-061-4/+12
| | | | | | This fixes the Bullet regression on i386/nocona. llvm-svn: 100553
* Properly enable load clustering.Jakob Stoklund Olesen2010-04-051-4/+0
| | | | | | | Operand 2 on a load instruction does not have to be a RegisterSDNode for this to work. llvm-svn: 100497
* Fix ADD32rr_alt instruction encoding bug. Patch by Marius Wachtler.Evan Cheng2010-04-051-1/+1
| | | | llvm-svn: 100480
* Remove FIXME.Eric Christopher2010-04-051-2/+1
| | | | llvm-svn: 100466
* don't use emitlabel in the arm asm printer yet, the order Chris Lattner2010-04-051-2/+7
| | | | | | | isn't well specified. ARM really needs to have its instprinter finished at some point. llvm-svn: 100439
* fix a couple problems I introduced handling symbolsChris Lattner2010-04-051-4/+10
| | | | | | with spaces in them. Sym->getName() != OS << *Sym llvm-svn: 100434
* Disambiguate else.Benjamin Kramer2010-04-051-1/+2
| | | | llvm-svn: 100423
* unthread MMI from FastISelChris Lattner2010-04-053-8/+5
| | | | llvm-svn: 100416
* remove the MMI pointer from MachineFrameInfo.Chris Lattner2010-04-054-39/+28
| | | | llvm-svn: 100415
* simplify code.Chris Lattner2010-04-051-7/+4
| | | | llvm-svn: 100412
* Get rid of traling whitespaces. No functionality change.Johnny Chen2010-04-051-1/+1
| | | | llvm-svn: 100404
* The disassembler impl. of MCDisassembler::getInstruction() was using the patternJohnny Chen2010-04-051-5/+23
| | | | | | | | | | | | | uint32_t insn; MemoryObject.readBytes(Address, 4, (uint8_t*)&insn, NULL) to read 4 bytes of memory contents into a 32-bit uint variable. This leaves the interpretation of byte order up to the host machine and causes PPC test cases of arm-tests, neon-tests, and thumb-tests to fail. Fixed to use a byte array for reading the memory contents and shift the bytes into place for the 32-bit uint variable in the ARM case and 16-bit halfword in the Thumb case. llvm-svn: 100403
* implement EmitFunctionEntryLabel to emit the .cc_top directive,Chris Lattner2010-04-051-61/+7
| | | | | | | allowing xcore to use the normal runOnMachineFunction implementation. llvm-svn: 100402
* prune some #includes.Chris Lattner2010-04-056-8/+0
| | | | llvm-svn: 100399
* Replace TSFlagsFields and TSFlagsShifts with a simpler TSFlags field.Jakob Stoklund Olesen2010-04-0513-103/+45
| | | | | | | | | | | | | | | | | | | When a target instruction wants to set target-specific flags, it should simply set bits in the TSFlags bit vector defined in the Instruction TableGen class. This works well because TableGen resolves member references late: class I : Instruction { AddrMode AM = AddrModeNone; let TSFlags{3-0} = AM.Value; } let AM = AddrMode4 in def ADD : I; TSFlags gets the expected bits from AddrMode4 in this example. llvm-svn: 100384
* fastisel doesn't need DwarfWriter, remove some tendricles.Chris Lattner2010-04-053-9/+5
| | | | llvm-svn: 100381
* Temporarily remove to disable building of ARM disassembler.Evan Cheng2010-04-051-16/+0
| | | | llvm-svn: 100380
* Re-apply 100265 but instead disable building of ARM disassembly for now.Evan Cheng2010-04-053-89/+31
| | | | llvm-svn: 100379
* Reverting 100265 to try to get buildbots green again. Lots of self-hosting ↵Evan Cheng2010-04-052-29/+86
| | | | | | buildbots started complaining since this commit. Also xfail ARM disassembly tests. llvm-svn: 100378
* just have all targets create the DwarfWriter.Chris Lattner2010-04-054-30/+0
| | | | llvm-svn: 100377
* simplify various getAnalysisUsage implementations.Chris Lattner2010-04-056-18/+0
| | | | llvm-svn: 100376
* eliminate the magic AbsoluteDebugSectionOffsets MAI hook,Chris Lattner2010-04-045-5/+0
| | | | | | | | | which is really a property of the section being referenced. Add a predicate to MCSection to replace it. Yay for reduction in magic. llvm-svn: 100367
* revert my patch, need to reconsider this and figure out what is really going on.Chris Lattner2010-04-041-0/+1
| | | | llvm-svn: 100358
* fix pasto, this is the wrong setting for arm elf.Chris Lattner2010-04-041-1/+0
| | | | llvm-svn: 100357
* Clean up SSEDomainFix pass.Jakob Stoklund Olesen2010-04-041-55/+77
| | | | | | | Restrict bit mask operations to the DomainValue class. Rename methods for clarity. llvm-svn: 100353
* don't reset the default.Chris Lattner2010-04-041-1/+0
| | | | llvm-svn: 100352
* clean up the asmprinter header and privatize some stuff.Chris Lattner2010-04-042-6/+6
| | | | llvm-svn: 100342
* remove TargetMachine.h #include, also, TRI isn't used frequently Chris Lattner2010-04-042-6/+7
| | | | | | enough to warrant caching in AsmPrinter, so remove it. llvm-svn: 100336
* Switch SSEDomainFix to SpecificBumpPtrAllocator.Jakob Stoklund Olesen2010-04-041-58/+37
| | | | llvm-svn: 100332
* Momentous day: remove the "O" member from AsmPrinter. Now all Chris Lattner2010-04-0417-113/+77
| | | | | | | | | | "asm printering" happens through MCStreamer. This also Streamerizes PIC16 debug info, which escaped my attention. This removes a leak from LLVMTargetMachine of the 'legacy' output stream. llvm-svn: 100327
* mc'ize the remaining uses of O.Chris Lattner2010-04-041-13/+18
| | | | llvm-svn: 100322
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