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* mark adjcallstack up/down as clobbering and using the SPChris Lattner2006-10-121-2/+2
| | | | llvm-svn: 30908
* Move the Imp tblgen class from the X86 backend to common code.Chris Lattner2006-10-122-5/+7
| | | | llvm-svn: 30907
* Mark ADJCALLSTACKUP/DOWN as clobbering ESP so that virtregmap will noticeChris Lattner2006-10-121-2/+6
| | | | | | that it can't assume ESP is unmodified across the instrs. llvm-svn: 30905
* fix compilation failure of smg2000Chris Lattner2006-10-121-1/+1
| | | | llvm-svn: 30900
* Fold "zero extending vector loads" now that evan added the chain manip stuff.Chris Lattner2006-10-111-5/+52
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This compiles both tests in X86/vec_ss_load_fold.ll into: _test1: movss 4(%esp), %xmm0 subss LCPI1_0, %xmm0 mulss LCPI1_1, %xmm0 minss LCPI1_2, %xmm0 xorps %xmm1, %xmm1 maxss %xmm1, %xmm0 cvttss2si %xmm0, %eax andl $65535, %eax ret instead of: _test1: movss LCPI1_0, %xmm0 movss 4(%esp), %xmm1 subss %xmm0, %xmm1 movss LCPI1_1, %xmm0 mulss %xmm0, %xmm1 movss LCPI1_2, %xmm0 minss %xmm0, %xmm1 xorps %xmm0, %xmm0 maxss %xmm0, %xmm1 cvttss2si %xmm1, %eax andl $65535, %eax ret llvm-svn: 30894
* ComplexPatterns sse_load_f32 and sse_load_f64 returns in / out chain operands.Evan Cheng2006-10-112-9/+14
| | | | llvm-svn: 30892
* Add properties to ComplexPattern.Evan Cheng2006-10-116-13/+16
| | | | llvm-svn: 30891
* Reduce the amount of state in the lowering code and drop old pattern ISel ↵Andrew Lenharth2006-10-113-28/+27
| | | | | | functions llvm-svn: 30881
* Naming consistency.Evan Cheng2006-10-112-14/+14
| | | | llvm-svn: 30878
* Use cute tblgen tricks to make zap handling more powerful. Specifically,Chris Lattner2006-10-112-21/+70
| | | | | | | | | | | | | | | | | | | | | | | | | | when the dag combiner simplifies an and mask, notice this and allow those bits to be missing from the zap mask. This compiles Alpha/zapnot4.ll into: sll $16,3,$0 zapnot $0,3,$0 ret $31,($26),1 instead of: ldah $0,1($31) lda $0,-8($0) sll $16,3,$1 and $1,$0,$0 ret $31,($26),1 It would be *really* nice to replace the hunk of code in the AlphaISelDAGToDAG.cpp file that matches (and (srl (x, C), c2) into (SRL (ZAPNOTi)) with a similar pattern, but I've spent enough time poking at alpha. Make andrew will do this. llvm-svn: 30875
* Jimptables working again on alpha.Andrew Lenharth2006-10-115-16/+18
| | | | | | As a bonus, use the GOT node instead of the AlphaISD::GOT for internal stuff. llvm-svn: 30873
* Remove dead/redundant instructions. These are handled by ZAPNOTiChris Lattner2006-10-111-6/+1
| | | | llvm-svn: 30872
* This entry is done. switched to the gcc way of doing things.Andrew Lenharth2006-10-111-150/+0
| | | | llvm-svn: 30867
* This has apparently been fixedChris Lattner2006-10-111-30/+0
| | | | llvm-svn: 30864
* uint <-> double conversionRafael Espindola2006-10-102-0/+26
| | | | llvm-svn: 30862
* add fp subRafael Espindola2006-10-101-0/+8
| | | | llvm-svn: 30859
* add double <-> int conversionRafael Espindola2006-10-102-0/+26
| | | | llvm-svn: 30858
* compare doublesRafael Espindola2006-10-102-2/+6
| | | | llvm-svn: 30856
* initial support for fp compares. Unordered compares not implemented yetRafael Espindola2006-10-102-11/+49
| | | | llvm-svn: 30854
* More isel time load folding checking for nodes that produce flag values.Evan Cheng2006-10-101-6/+57
| | | | | | See comment in CanBeFoldedBy() for detailed explanation. llvm-svn: 30851
* Don't go too crazy with these AddComplexity. Try matching shufps with loadEvan Cheng2006-10-091-8/+19
| | | | | | folding first. llvm-svn: 30848
* Don't convert to MOVLP if using shufps etc. may allow load folding.Evan Cheng2006-10-091-2/+6
| | | | llvm-svn: 30847
* Reflects ISD::LOAD / ISD::LOADX / LoadSDNode changes.Evan Cheng2006-10-0917-219/+264
| | | | llvm-svn: 30844
* add float -> double and double -> float conversionRafael Espindola2006-10-091-0/+5
| | | | llvm-svn: 30835
* add ADDS and ADCSRafael Espindola2006-10-091-0/+8
| | | | llvm-svn: 30830
* expand ISD::SELECTRafael Espindola2006-10-091-0/+2
| | | | llvm-svn: 30829
* add a noteRafael Espindola2006-10-091-0/+14
| | | | llvm-svn: 30828
* expand ISD::EXTLOADRafael Espindola2006-10-091-0/+2
| | | | llvm-svn: 30827
* most ARM targets are little endianRafael Espindola2006-10-091-1/+1
| | | | llvm-svn: 30826
* completely disable folding of loads into scalar sse instructions and provideChris Lattner2006-10-072-14/+61
| | | | | | | | | | a framework for doing it right. This fixes CodeGen/X86/2006-10-07-ScalarSSEMiscompile.ll. Once X86DAGToDAGISel::SelectScalarSSELoad is implemented right, this task will be done. llvm-svn: 30817
* convert packed FP add/sub/mul/div to use a multiclass.Chris Lattner2006-10-071-63/+32
| | | | llvm-svn: 30815
* one multiclass now defines all 8 variants of binary-scalar-sse-fp operations.Chris Lattner2006-10-071-49/+64
| | | | llvm-svn: 30814
* Switch ADD/MUL/DIV/SUB scalarsse fp ops to a multiclassChris Lattner2006-10-071-53/+27
| | | | llvm-svn: 30813
* Random acts of shrinkageChris Lattner2006-10-071-34/+24
| | | | llvm-svn: 30812
* Convert pand/por/pxor to use multiclassChris Lattner2006-10-071-25/+4
| | | | llvm-svn: 30811
* Convert some more instructions over to use a new multiclass.Chris Lattner2006-10-071-27/+19
| | | | | | Fix a bug where the asmstring for PSUBQrm was wrong. llvm-svn: 30810
* Fix a bug where PADDQrm printed paddd instead of paddq.Chris Lattner2006-10-071-1/+1
| | | | llvm-svn: 30809
* Add multiclass for SSE2 instructions that correspond to simple binops.Chris Lattner2006-10-071-56/+35
| | | | llvm-svn: 30808
* rename:Chris Lattner2006-10-071-40/+40
| | | | | | | | | PDI_binop_rm -> PDI_binop_rm_int PDI_binop_rmi -> PDI_binop_rmi_int to make it clear that these are for use with intrinsics. llvm-svn: 30807
* Convert saturating PADD/PSUB's to use a multiclassChris Lattner2006-10-071-72/+10
| | | | llvm-svn: 30806
* Convert PAVG*, PMADDWD, and PMUL* to use multiclasses.Chris Lattner2006-10-071-84/+39
| | | | llvm-svn: 30805
* Fix typo in packsswb instr definition, where the load had the wrong type.Chris Lattner2006-10-071-15/+1
| | | | | | This allows us to use the multiclass for other packs. llvm-svn: 30804
* implement FUITOS and FUITODRafael Espindola2006-10-072-1/+31
| | | | llvm-svn: 30803
* implement FLDDRafael Espindola2006-10-072-5/+11
| | | | llvm-svn: 30802
* implement fadds, faddd, fmuls and fmuldRafael Espindola2006-10-071-0/+18
| | | | llvm-svn: 30801
* handle pmin/pmax with multiclassesChris Lattner2006-10-071-50/+10
| | | | llvm-svn: 30800
* simplify pack and shift intrinsics with multiclassesChris Lattner2006-10-071-137/+46
| | | | llvm-svn: 30797
* Use a multiclass to simplify 'SSE2 Integer comparison'Chris Lattner2006-10-071-61/+19
| | | | llvm-svn: 30796
* move class defns close to uses to make it easier to readChris Lattner2006-10-071-17/+18
| | | | llvm-svn: 30795
* simplify horizontal op definitionsChris Lattner2006-10-071-26/+21
| | | | llvm-svn: 30794
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