| Commit message (Collapse) | Author | Age | Files | Lines |
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encodings taken from the AVX manual
llvm-svn: 109204
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SSE, so we can't return floating point values if this
is disabled. Detect this error for clang.
With SSE1 only, f64 is a problem; it can be done, but
neither llvm-gcc nor clang has ever generated correct
code for it. Since nobody noticed this I think it's
OK to treat it as an error for now.
This also handles SSE-sized vectors of floating point.
8207686, 8204109.
llvm-svn: 109201
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with PINSRW, which was totally wrong because of a typo I introduced previously
llvm-svn: 109198
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ARM/PPC/MSP430-specific code (which are the only targets that
implement the hook) can directly reference their target-specific
instrinfo classes.
llvm-svn: 109171
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This complete the assembler support for the general AVX ISA. But we still miss instructions from FMA3 and CLMUL specific feature flags, which are now the next step
llvm-svn: 109168
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llvm-svn: 109167
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This is probably not the best way to implement "Force LR to
be spilled if the Thumb function size is > 2048." do this,
it should use the branch shortening infrastructure, but I'm
just preserving functionality here.
llvm-svn: 109165
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llvm-svn: 109154
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rip out the implementation of X86InstrInfo::GetInstSizeInBytes.
The code being ripped out just implemented a copy and hacked up
version of the (old) instruction encoder, and is buggy and
terrible in other ways. Since "GetInstSizeInBytes" is really
only there to support the JIT's "NeedsExactSize" hook (which
noone is using), just rip out the code. I will rip out the
NeedsExactSize hook next.
This resolves rdar://7617809 - switch X86InstrInfo::GetInstSizeInBytes to use X86MCCodeEmitter
llvm-svn: 109149
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call. Fixes PR7608
llvm-svn: 109125
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llvm-svn: 109092
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llvm-svn: 109091
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llvm-svn: 109090
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especially on other platforms. Is there a better way to fix this.
llvm-svn: 109084
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llvm-svn: 109081
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for lowering without sse2. Add a couple of new testcases.
Fixes a few libgomp tests and latent bugs. Remove a few todos.
llvm-svn: 109078
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instruction does not have to be 4-byte aligned. Rather, it's the offset + 2 that must be aligned since the instruction expands into:
mov pc, r1
.align 2
LJTI0_0_0:
.long LBB0_14
This fixes rdar://8213383. No test case since it's not possible to come up with a suitable small one.
llvm-svn: 109076
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llvm-svn: 109070
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llvm-svn: 109069
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llvm-svn: 109064
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Add 64-bit (GR64) versions of some instructions (which are not
described in their SSE forms, but are described in AVX)
llvm-svn: 109063
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and then forced every register to be a vr128 on win64.
llvm-svn: 109060
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rdar://8202967
llvm-svn: 109057
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asmprinter or mangler around. This is option #B for killing off
X86InstrInfo::GetInstSizeInBytes. Option #A (killing
"needsexactsize") was sent for consideration to llvmdev.
llvm-svn: 109056
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llvm-svn: 109047
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llvm-svn: 109045
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in their SSE forms (although they exist), but add the AVX forms anyway, so the assembler can benefit from it
llvm-svn: 109039
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1) all registers were spilled as xmm, regardless of actual size
2) win64 abi doesn't do the varargs-size-in-%al thing
Still to look into:
xmm6-15 are marked as clobbered by call instructions on win64 even though they aren't.
llvm-svn: 109035
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llvm-svn: 109032
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llvm-svn: 109009
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the wrong directory.
llvm-svn: 109005
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Fixes a pile of libgomp failures in the llvm-gcc testsuite due
to the libcall not existing.
llvm-svn: 109004
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llvm-svn: 109002
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llvm-svn: 108991
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llvm-svn: 108984
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support it
llvm-svn: 108983
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llvm-svn: 108964
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explode right now.
llvm-svn: 108955
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llvm-svn: 108952
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llvm-svn: 108950
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llvm-svn: 108949
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llvm-svn: 108947
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llvm-svn: 108945
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llvm-svn: 108929
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llvm-svn: 108892
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instruction selection to prefer it when possible. rdar://7903972
llvm-svn: 108844
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llvm-svn: 108841
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- Fix a typo for PIC check during jmp table lowering
- Also fix the "first jump table basic block is not
considered only reachable by fall through" problem, use this
ad-hoc solution until I come up with something better.
Patch by stetorvs@gmail.com
llvm-svn: 108820
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llvm-svn: 108816
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llvm-svn: 108812
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