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* Add AVX vbroadcast new instructionBruno Cardoso Lopes2010-07-202-0/+28
| | | | llvm-svn: 108788
* Update CMake files.Daniel Dunbar2010-07-204-8/+8
| | | | llvm-svn: 108787
* sink the arm implementations of ASmPrinter and MCInstLowerChris Lattner2010-07-193-1/+1
| | | | | | | | out of the AsmPrinter directory into libarm. Now the ARM InstPrinters depend jsut on the MC stuff, not on vmcore or codegen. llvm-svn: 108783
* fix a layering problem by moving the x86 implementationChris Lattner2010-07-194-5/+5
| | | | | | | | of AsmPrinter and InstLowering into libx86 and out of the asmprinter subdirectory. Now X86/AsmPrinter just depends on MC stuff, not all of codegen and LLVM IR. llvm-svn: 108782
* Add 256-bit vaddsub, vhadd, vhsub, vblend and vdpp instructions!Bruno Cardoso Lopes2010-07-196-81/+128
| | | | llvm-svn: 108769
* ARM has to provide its own TargetLowering::findRepresentativeClass because ↵Evan Cheng2010-07-192-0/+20
| | | | | | its scalar floating point registers alias its vector registers. llvm-svn: 108761
* X86: Mark JMP{32,64}[mr] as requires 32-bit/64-bit mode. They are the sameDaniel Dunbar2010-07-192-4/+4
| | | | | | | | instruction, we only want to allow the one for the current subtarget. - This also fixes suffix matching for jmp instructions, because it eliminates the ambiguity between 'jmpl' and 'jmpq'. llvm-svn: 108746
* Since ARM emits inline jump tables as part of the ConstantIsland pass,Jim Grosbach2010-07-192-0/+6
| | | | | | | | it should set the jump table encloding the EK_Inline. This prevents a second, unused, copy of the table from being emitted after the function body. PR6581. llvm-svn: 108730
* revert so I can get the right PR# in the log message.Jim Grosbach2010-07-192-6/+0
| | | | llvm-svn: 108727
* Since ARM emits inline jump tables as part of the ConstantIsland pass,Jim Grosbach2010-07-192-0/+6
| | | | | | | | it should set the jump table encloding the EK_Inline. This prevents a second, unused, copy of the table from being emitted after the function body. PR7499. llvm-svn: 108722
* X86-64: Mark WINCALL and more tail call instructions as code gen only.Daniel Dunbar2010-07-191-2/+3
| | | | llvm-svn: 108685
* X86: Mark some tail call pseduo instruction as code gen only.Daniel Dunbar2010-07-191-1/+2
| | | | llvm-svn: 108684
* X86: Mark In32/64BitMode on LEAVE[64] and SYSEXIT[64].Daniel Dunbar2010-07-192-4/+4
| | | | llvm-svn: 108683
* MC/X86: We now match instructions like "incl %eax" correctly for the arch we areDaniel Dunbar2010-07-192-54/+0
| | | | | | assembling; remove crufty custom cleanup code. llvm-svn: 108681
* X86: Mark MOV.*_{TC,NOREX} instruction as code gen only, they aren't real.Daniel Dunbar2010-07-192-0/+6
| | | | llvm-svn: 108680
* X86: MOV8o8a, MOV8ao8, etc. are only valid in 32-bit mode.Daniel Dunbar2010-07-191-6/+12
| | | | llvm-svn: 108679
* TblGen/AsmMatcher: Add support for honoring instruction Requires<[]> ↵Daniel Dunbar2010-07-191-4/+12
| | | | | | | | attributes as part of the matcher. - Currently includes a hack to limit ourselves to "In32BitMode" and "In64BitMode", because we don't have the other infrastructure to properly deal with setting SSE, etc. features on X86. llvm-svn: 108677
* Target: Give the TargetAsmParser access to the TargetMachine.Daniel Dunbar2010-07-192-8/+10
| | | | | | - Unfortunate, but necessary for now to handle subtarget instruction matching. Eventually we should factor out the lower level target machine information so we don't need to do this. llvm-svn: 108664
* the stackifier is global!Chris Lattner2010-07-171-2/+2
| | | | llvm-svn: 108626
* doxygenify some comments.Chris Lattner2010-07-171-19/+19
| | | | llvm-svn: 108625
* Add combiner patterns to more effectively utilize the BFI (bitfield insert)Jim Grosbach2010-07-172-37/+68
| | | | | | | instruction for non-constant operands. This includes the case referenced in the README.txt regarding a bitfield copy. llvm-svn: 108608
* add BFI to getTargetNodeName()Jim Grosbach2010-07-171-0/+1
| | | | llvm-svn: 108603
* Fix logic think-oJim Grosbach2010-07-171-1/+1
| | | | llvm-svn: 108601
* Remove unnecessary check that was subsumed into canRealignStack.Eric Christopher2010-07-172-6/+4
| | | | llvm-svn: 108588
* Make more explicit and add some currently disabled error messages forEric Christopher2010-07-171-4/+18
| | | | | | | | | stack realignment on ARM. Also check for function attributes as we do on X86 as well as make explicit that we're checking can as well as needs in this function. llvm-svn: 108582
* Make comment a bit more clear as well as return statement sinceEric Christopher2010-07-171-2/+2
| | | | | | needsStackRealignment is currently checking the can conditions as well. llvm-svn: 108581
* Add basic support to code-gen the ARM/Thumb2 bit-field insert (BFI) instructionJim Grosbach2010-07-166-36/+104
| | | | | | | and a combine pattern to use it for setting a bit-field to a constant value. More to come for non-constant stores. llvm-svn: 108570
* Remove the isMoveInstr() hook.Jakob Stoklund Olesen2010-07-1626-618/+0
| | | | llvm-svn: 108567
* Avoid isMoveInstr when printing XCore pseudo-moves.Jakob Stoklund Olesen2010-07-161-7/+5
| | | | llvm-svn: 108566
* Use MI.isCopy.Jakob Stoklund Olesen2010-07-161-4/+2
| | | | llvm-svn: 108565
* Use a small local function for a single remaining late isMoveInstr call inJakob Stoklund Olesen2010-07-161-24/+42
| | | | | | Thumb2ITBlockPass. llvm-svn: 108564
* Rename DBG_LABEL PROLOG_LABEL, because it's only used during prolog emission andBill Wendling2010-07-1612-21/+21
| | | | | | thus is a much more meaningful name. llvm-svn: 108563
* Keep valgrind quiet.Jakob Stoklund Olesen2010-07-161-1/+6
| | | | | | | The isLive() method can read uninitialized memory, but it still gives correct results. llvm-svn: 108561
* Emit COPY instead of FMR/FMSD instructions for floating point conversion onJakob Stoklund Olesen2010-07-162-12/+9
| | | | | | PowerPC. llvm-svn: 108555
* Add missing attributes to cpp backend.Eli Friedman2010-07-161-1/+9
| | | | llvm-svn: 108547
* Accept registers with P modifier. PR 5314.Dale Johannesen2010-07-161-0/+4
| | | | llvm-svn: 108545
* Teach PPCInstrInfo::storeRegToStackSlot and loadRegFromStackSlot to add memoryJakob Stoklund Olesen2010-07-161-0/+19
| | | | | | | | | operands. Hopefully this fixes the llvm-gcc-powerpc-darwin9 buildbot. It really shouldn't since missing memoperands should not affect correctness. llvm-svn: 108540
* Remove the X86::FP_REG_KILL pseudo-instruction and the X86FloatingPointRegKillJakob Stoklund Olesen2010-07-167-182/+1
| | | | | | | | | pass that inserted it. It is no longer necessary to limit the live ranges of FP registers to a single basic block. llvm-svn: 108536
* Search for a free FP register instead of just assuming FP7 is not in use.Jakob Stoklund Olesen2010-07-161-6/+12
| | | | llvm-svn: 108535
* Allow x87 FP registers to be alive globally in a function.Jakob Stoklund Olesen2010-07-162-37/+389
| | | | | | | | | | | | | | | | FP_REG_KILL instructions are still inserted, but can be disabled by passing -live-x87 to llc. The X87FPRegKillInserterPass is going to be removed shortly. CFG edges are partioned into bundles where the x87 stack must be allocated identically. Code is insertad at the end of each basic block that shuffles the live FP registers to match the outgoing bundles expectations. This fix is in preparation for some upcoming register allocator improvements that may extend the live range of registers beyond a basic block, similar to LICM. It also provides a nice runtime speedup if you are building with -mfpmath=387. llvm-svn: 108529
* Split -enable-finite-only-fp-math to two options:Evan Cheng2010-07-154-24/+20
| | | | | | -enable-no-nans-fp-math and -enable-no-infs-fp-math. All of the current codegen fp math optimizations only care whether the fp arithmetics arguments and results can never be NaN. llvm-svn: 108465
* fix the encoding of MMX_MOVFR642Qrr, it starts with 0xF2 not 0xF3,Chris Lattner2010-07-151-1/+1
| | | | | | | | this fixes rdar://8192860. Unfortunately it can only be triggered with llc because llvm-mc matches another (correctly encoded) version of this, so no testcase. llvm-svn: 108454
* Random note about bswap.Eli Friedman2010-07-151-0/+26
| | | | llvm-svn: 108396
* Last COPY conversion.Jakob Stoklund Olesen2010-07-141-3/+2
| | | | llvm-svn: 108387
* Remove restriction on NEON alignment values. Some of the NEON ld/stBob Wilson2010-07-143-9/+4
| | | | | | | instructions use different values (e.g., 2-byte or 4-byte alignment). Also fix ARMInstPrinter to print these alignments as bits instead of bytes. llvm-svn: 108386
* Use TargetOpcode::COPY instead of X86-native register copy instructions whenJakob Stoklund Olesen2010-07-142-30/+27
| | | | | | | lowering atomics. This will allow those copies to still be coalesced after TII::isMoveInstr is removed. llvm-svn: 108385
* fix indentationChris Lattner2010-07-141-9/+7
| | | | llvm-svn: 108368
* Don't pass StringRef by reference.Benjamin Kramer2010-07-1424-41/+42
| | | | llvm-svn: 108366
* Merge lib/Target/X86/X86COFF.h into include/llvm/Support/COFF.h,Chris Lattner2010-07-142-100/+8
| | | | | | patch by Michael Spencer! llvm-svn: 108342
* Improve 64-subtraction of immediates when parts of the immediate can fitJim Grosbach2010-07-142-11/+40
| | | | | | | | | | | in the literal field of an instruction. E.g., long long foo(long long a) { return a - 734439407618LL; } rdar://7038284 llvm-svn: 108339
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