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* Add support for 64-bit logical NOR.Akira Hatanaka2011-10-031-0/+7
| | | | llvm-svn: 141029
* Add support for 64-bit count leading ones and zeros instructions.Akira Hatanaka2011-10-031-0/+15
| | | | llvm-svn: 141028
* ARM assembly parsing and encoding for VMRS/FMSTAT.Jim Grosbach2011-10-033-0/+18
| | | | llvm-svn: 141025
* Add support for 64-bit divide instructions.Akira Hatanaka2011-10-033-3/+17
| | | | llvm-svn: 141024
* Thumb2 ADD/SUB can take SP as a destination register.Jim Grosbach2011-10-031-18/+18
| | | | | | | It's documented as a separate instruction to line up with the Thumb1 encodings, for which it really is a distinct instruction encoding. llvm-svn: 141020
* Clean up MipsInstrInfo::copyPhysReg and handle copies from and to 64-bit integerAkira Hatanaka2011-10-031-51/+44
| | | | | | registers. llvm-svn: 141019
* Add support for 64-bit integer multiply instructions.Akira Hatanaka2011-10-032-4/+26
| | | | llvm-svn: 141017
* Add definitions of instructions which move values between 64-bit integerAkira Hatanaka2011-10-032-0/+27
| | | | | | | registers and 64-bit HI and LO registers. Fix encoding of the 32-bit versions of the instructions. llvm-svn: 141015
* Add support for MOVBE and RDRAND instructions for the assembler and ↵Craig Topper2011-10-035-1/+48
| | | | | | disassembler. Includes feature flag checking, but no instrinsic support. Fixes PR10832, PR11026 and PR11027. llvm-svn: 141007
* Add the returns_twice attribute to LLVM.Rafael Espindola2011-10-031-1/+1
| | | | llvm-svn: 141001
* Treat VEX.vvvv as a 3-bit field outside of 64-bit mode. Prevents access to ↵Craig Topper2011-10-031-0/+3
| | | | | | registers xmm8-xmm15 outside 64-bit mode. llvm-svn: 140997
* Fix VEX disassembling to ignore REX.RXBW bits in 32-bit mode.Craig Topper2011-10-031-9/+13
| | | | llvm-svn: 140993
* Fix some Intel syntax disassembly issues with instructions that implicitly ↵Craig Topper2011-10-022-32/+47
| | | | | | use AL/AX/EAX/RAX such as ADD/SUB/ADC/SUBB/XOR/OR/AND/CMP/MOV/TEST. llvm-svn: 140974
* Special case disassembler handling of REX.B prefix on NOP instruction to ↵Craig Topper2011-10-021-2/+39
| | | | | | decode as XCHG R8D, EAX instead. Fixes PR10344. llvm-svn: 140971
* Fix disassembling of INVEPT and INVVPID to take operandsCraig Topper2011-10-011-2/+8
| | | | llvm-svn: 140955
* Fix disassembler handling of CRC32 which is an odd instruction that uses ↵Craig Topper2011-10-011-0/+3
| | | | | | 0xf2 as an opcode extension and allows the opsize prefix. This necessitated adding IC_XD_OPSIZE and IC_64BIT_XD_OPSIZE contexts. Unfortunately, this increases the size of the disassembler tables. Fixes PR10702. llvm-svn: 140954
* Revert r140924 "Attempt to fix dynamic stack realignment for thumb1 functions."Chad Rosier2011-10-013-27/+7
| | | | | | to appease nightly testers. Not quite there yet. llvm-svn: 140953
* No one should be using the method directly. Assert if they do.Bill Wendling2011-10-011-12/+1
| | | | llvm-svn: 140947
* Add a convenience method to tell if two things are equal.Bill Wendling2011-10-012-16/+10
| | | | llvm-svn: 140946
* Use the ARMConstantPoolMBB class to handle the MBB values.Bill Wendling2011-10-014-36/+13
| | | | llvm-svn: 140943
* Add ARMConstantPoolMBB to hold an MBB value in the constant pool.Bill Wendling2011-10-012-1/+90
| | | | llvm-svn: 140942
* Remove dead code.Bill Wendling2011-10-012-14/+0
| | | | llvm-svn: 140941
* Remove now dead methods and ivar.Bill Wendling2011-10-012-34/+12
| | | | llvm-svn: 140940
* Use the new ARMConstantPoolSymbol class to handle external symbols.Bill Wendling2011-10-016-14/+27
| | | | llvm-svn: 140939
* Add an ARMConstantPool class for external symbols. This will split out the ↵Bill Wendling2011-10-012-5/+118
| | | | | | support for external symbols from the base class. llvm-svn: 140938
* Remove now dead methods and ivar from ARMConstantPoolValue.Bill Wendling2011-10-012-38/+3
| | | | llvm-svn: 140937
* Switch over to using ARMConstantPoolConstant for global variables, functions,Bill Wendling2011-10-016-34/+39
| | | | | | and block addresses. llvm-svn: 140936
* Some more refactoring.Bill Wendling2011-10-012-6/+78
| | | | | | | | * Add a couple of Create methods to the ARMConstantPoolConstant class, * Add its own version of getExistingMachineCPValue, and * Modify hasSameValue to return false if the object isn't an ARMConstantPoolConstant. llvm-svn: 140935
* Add a Create method that accepts 'kind' and 'pcadj' arguments.Bill Wendling2011-10-012-0/+10
| | | | llvm-svn: 140934
* Refactoring: Separate out the ARM constant pool Constant from the ARM constantBill Wendling2011-10-012-6/+94
| | | | | | | | pool value. It's not used right now, but will be soon. llvm-svn: 140933
* Attempt to fix dynamic stack realignment for thumb1 functions. It is in fact Chad Rosier2011-10-013-7/+27
| | | | | | | | useful if an optimization assumes the stack has been realigned. Credit to Eli for his assistance. rdar://10043857 llvm-svn: 140924
* Store sub-class lists as a bit vector.Jakob Stoklund Olesen2011-09-303-34/+15
| | | | | | | | | | | | | | This uses less memory and it reduces the complexity of sub-class operations: - hasSubClassEq() and friends become O(1) instead of O(N). - getCommonSubClass() becomes O(N) instead of O(N^2). In the future, TableGen will infer register classes. This makes it cheap to add them. llvm-svn: 140898
* Move getCommonSubClass() into TRI.Jakob Stoklund Olesen2011-09-301-2/+2
| | | | | | It will soon need the context. llvm-svn: 140896
* Correct for my over-eager delete finger.Jim Grosbach2011-09-301-0/+1
| | | | llvm-svn: 140892
* Register the MC object streamer.Akira Hatanaka2011-09-301-0/+18
| | | | | | Patch by Reed Kotler at Mips Technologies. llvm-svn: 140887
* Register Asm backend. Add functions to MipsAsmBackend.Akira Hatanaka2011-09-303-0/+55
| | | | | | Patch by Reed Kotler at Mips Technologies. llvm-svn: 140886
* Add MCELFObjectTargetWriter and MCAsmBackend classes.Akira Hatanaka2011-09-302-0/+72
| | | | | | Patch by Reed Kotler at Mips Technologies. llvm-svn: 140885
* Update CMake build.Benjamin Kramer2011-09-301-1/+2
| | | | llvm-svn: 140879
* Initial implementation of MipsMCCodeEmitter.Akira Hatanaka2011-09-303-1/+68
| | | | | | Patch by Reed Kotler at Mips Technologies. llvm-svn: 140878
* Add definitions of Mips64 rotate instructions.Akira Hatanaka2011-09-302-1/+23
| | | | llvm-svn: 140870
* Constify 'isLSDA' and move a method out-of-line.Bill Wendling2011-09-302-14/+20
| | | | llvm-svn: 140868
* ARM Darwin default relocation model is PIC.Jim Grosbach2011-09-301-2/+5
| | | | | | | This matches clang, so default options in llc and friends are now closer to clang's defaults. llvm-svn: 140863
* isCommutable should be 0 for DSUBu.Akira Hatanaka2011-09-301-1/+1
| | | | llvm-svn: 140862
* ARM Fixup valus for movt/movw are for the whole value.Jim Grosbach2011-09-301-7/+0
| | | | | | | | | Remove an assert that was expecting only the relevant 16bit portion for the fixup being handled. Also kill some dead code in the T2 portion. rdar://9653509 llvm-svn: 140861
* PTX: Various stylistic and code readability changes recommended by Jim Grosbach.Justin Holewinski2011-09-3010-270/+65
| | | | llvm-svn: 140855
* PTX: Add programmable rounding mode specifier for int <-> fp conversion instrs.Justin Holewinski2011-09-302-124/+174
| | | | | | Also take this opportunity to clean up the rounding mode pass. llvm-svn: 140854
* PTX: Attempt to cleanup/unify the handling of FP rounding modes. This requiresJustin Holewinski2011-09-309-197/+471
| | | | | | us to manually provide Pat<> definitions for all FP instruction patterns. llvm-svn: 140849
* Mips64 shift instructions.Akira Hatanaka2011-09-301-0/+40
| | | | llvm-svn: 140841
* Mips64 arithmetic and logical instructions with one source register andAkira Hatanaka2011-09-301-0/+30
| | | | | | immediate. llvm-svn: 140839
* ARM fix encoding of VMOV.f32 and VMOV.f64 immediates.Jim Grosbach2011-09-308-145/+128
| | | | | | | | | | | Encode the immediate into its 8-bit form as part of isel rather than later, which simplifies things for mapping the encoding bits, allows the removal of the custom disassembler decoding hook, makes the operand printer trivial, and prepares things more cleanly for handling these in the asm parser. rdar://10211428 llvm-svn: 140834
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