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* Implement 32 & 64 bit versions of PPC atomicDale Johannesen2008-08-255-48/+230
| | | | | | binary primitives. llvm-svn: 55343
* 80 col. violations.Evan Cheng2008-08-251-3/+4
| | | | llvm-svn: 55341
* Try approach to moving call address load inside of callseq_start. Now it's ↵Evan Cheng2008-08-252-35/+108
| | | | | | done during the preprocess of x86 isel. callseq_start's chain is changed to load's chain node; while load's chain is the last of callseq_start or the loads or copytoreg nodes inserted to move arguments to the right spot. llvm-svn: 55338
* Remove PPC-specific lowering for atomics; theDale Johannesen2008-08-254-108/+12
| | | | | | | | generic stuff works fine. Mark rewritten cmp-and-swap as not using CR1. llvm-svn: 55336
* It's important for the cmp-and-swap to balanceDale Johannesen2008-08-251-13/+31
| | | | | | | loads and stores but it's even more important for it to store the right value.:( llvm-svn: 55319
* Nevermind. This broke the bootstrap (?!).Bill Wendling2008-08-252-11/+7
| | | | llvm-svn: 55318
* MOVQ2DQ and MOVQ2DQ use SSE2. We should conditionalize the use of theseBill Wendling2008-08-252-7/+11
| | | | | | instructions on having SSE2. llvm-svn: 55317
* Fix asm printing of MOVSDto64mr and MOV64toSDrm.Evan Cheng2008-08-251-2/+2
| | | | llvm-svn: 55300
* Temporarily reverting r55292. It's causing a bootstraping failure:Bill Wendling2008-08-241-7/+2
| | | | | | | | | | | | | | | | | /Volumes/Sandbox/Buildbot/llvm/full-llvm/build/llvm-gcc.obj/./gcc/xgcc ... src/libiberty/make-temp-file.c -o make-temp-file.o Assertion failed: (Node2Index[SU->NodeNum] > Node2Index[I->Dep->NodeNum] && "Wrong topological sorting"), function InitDAGTopologicalSorting, file /Volumes/Sandbox/Buildbot/llvm/full-llvm/build/llvm.src/lib/CodeGen/SelectionDAG/ScheduleDAGRRList.cpp, line 508. ../../../../llvm-gcc.src/libiberty/hashtab.c:955: internal compiler error: Abort trap Please submit a full bug report, with preprocessed source if appropriate. See <URL:http://developer.apple.com/bugreporter> for instructions. make[4]: *** [hashtab.o] Error 1 make[4]: *** Waiting for unfinished jobs.... make[3]: *** [multi-do] Error 1 make[2]: *** [all] Error 2 make[1]: *** [all-target-libiberty] Error 2 make: *** [all] Error 2 llvm-svn: 55295
* Move callseq_start above the call address load to allow load to be folded ↵Evan Cheng2008-08-241-2/+7
| | | | | | into the call node. llvm-svn: 55292
* Use additionnal include directory instead of ../ in #include.Cedric Venet2008-08-243-9/+9
| | | | | | Suggested by aKor. llvm-svn: 55282
* Switch the asmprinter (.ll) and all the stuff it requires over toChris Lattner2008-08-234-4/+6
| | | | | | | | | | | | | | | | | | | | | | | | use raw_ostream instead of std::ostream. Among other goodness, this speeds up llvm-dis of kc++ with a release build from 0.85s to 0.49s (88% faster). Other interesting changes: 1) This makes Value::print be non-virtual. 2) AP[S]Int and ConstantRange can no longer print to ostream directly, use raw_ostream instead. 3) This fixes a bug in raw_os_ostream where it didn't flush itself when destroyed. 4) This adds a new SDNode::print method, instead of only allowing "dump". A lot of APIs have both std::ostream and raw_ostream versions, it would be useful to go through and systematically anihilate the std::ostream versions. This passes dejagnu, but there may be minor fallout, plz let me know if so and I'll fix it. llvm-svn: 55263
* Provide a 64 bit variant of mmx.maskmovq intrinsic lowering.Anton Korobeynikov2008-08-232-0/+7
| | | | | | Is there way to avoid explicit target check? llvm-svn: 55238
* Move the point at which FastISel taps into the SelectionDAGISelDan Gohman2008-08-239-59/+56
| | | | | | | | | | | | | | | | | | process up to a higher level. This allows FastISel to leverage more of SelectionDAGISel's infastructure, such as updating Machine PHI nodes. Also, implement transitioning from SDISel back to FastISel in the middle of a block, so it's now possible to go back and forth. This allows FastISel to hand individual CallInsts and other complicated things off to SDISel to handle, while handling the rest of the block itself. To help support this, reorganize the SelectionDAG class so that it is allocated once and reused throughout a function, instead of being completely reallocated for each block. llvm-svn: 55219
* Make option variables static, so they won't cause nameclashAnton Korobeynikov2008-08-221-7/+10
| | | | llvm-svn: 55203
* Reverting r55190, r55191, and r55192. They broke the build with this error ↵Bill Wendling2008-08-222-16/+17
| | | | | | | | | | | | | | | message: {standard input}:17:bad register name `%sil' make[4]: *** [libgcc/./_addvsi3.o] Error 1 make[4]: *** Waiting for unfinished jobs.... {standard input}:23:bad register name `%dil' {standard input}:28:bad register name `%dil' make[4]: *** [libgcc/./_addvdi3.o] Error 1 {standard input}:18:bad register name `%sil' make[4]: *** [libgcc/./_subvsi3.o] Error 1 llvm-svn: 55200
* Anyext tweaks for x86. When extloading a value to i32 or i64, chooseDan Gohman2008-08-222-17/+16
| | | | | | | | instructions that define the full 32 or 64-bit value. When anyexting from i8 to i16 or i32, it's not necessary to zero out the high portion of the register. llvm-svn: 55190
* Implement __sync_synchronize on ppc32. Patch by Gary Benson.Dale Johannesen2008-08-223-3/+23
| | | | llvm-svn: 55186
* Rewrite ppc code generated for __sync_{bool|val}_compare_and_swapDale Johannesen2008-08-223-13/+19
| | | | | | | so that lwarx and stwcx are always executed the same number of times. This is important for performance, I'm told. llvm-svn: 55163
* Factor out the predicate check code from DAGISelEmitter.cppDan Gohman2008-08-221-0/+1
| | | | | | | | | and use it in FastISelEmitter.cpp, and make FastISel subtarget aware. Among other things, this lets it work properly on x86 targets that don't have SSE, where it successfully selects x87 instructions. llvm-svn: 55156
* If part of the mask is "undef", then ignore it as we don't care what goes ↵Bill Wendling2008-08-211-0/+2
| | | | | | into it. llvm-svn: 55147
* Fix whitespace. No functionality change.Bill Wendling2008-08-211-6/+20
| | | | llvm-svn: 55146
* Fix a number of byval / memcpy / memset related codegen issues.Evan Cheng2008-08-211-44/+46
| | | | | | | 1. x86-64 byval alignment should be max of 8 and alignment of type. Previously the code was not doing what the commit message was saying. 2. Do not use byte repeat move and store operations. These are slow. llvm-svn: 55139
* Treat floating point ST1 the same as ST0 when lowering for a call resultMon P Wang2008-08-211-1/+2
| | | | llvm-svn: 55135
* Add libm-oriented ISD opcodes for rounding operations.Dan Gohman2008-08-211-0/+5
| | | | llvm-svn: 55130
* Allow inline asm nodes with empty bodies inside JIT.Anton Korobeynikov2008-08-211-2/+6
| | | | | | | This unbreaks explicit reg vars inside JIT, which are implemented in such hacky way :) llvm-svn: 55128
* Simplify SelectRoot's interface, and factor out some common codeDan Gohman2008-08-219-9/+9
| | | | | | from all targets. llvm-svn: 55124
* Clean up whitespace.Bill Wendling2008-08-211-5/+7
| | | | llvm-svn: 55117
* unbreak the CBE on treeadd an many others.Chris Lattner2008-08-211-2/+2
| | | | llvm-svn: 55112
* Use raw_ostream throughout the AsmPrinter.Owen Anderson2008-08-2145-106/+300
| | | | llvm-svn: 55092
* Move the handling of ANY_EXTEND, SIGN_EXTEND_INREG, and TRUNCATEDan Gohman2008-08-203-138/+159
| | | | | | | | | | | | | out of X86ISelDAGToDAG.cpp C++ code and into tablegen code. Among other things, using tablegen for these things makes them friendlier to FastISel. Tablegen can handle the case of i8 subregs on x86-32, but currently the C++ code for that case uses MVT::Flag in a tricky way, and it happens to schedule better in some cases. So for now, leave the C++ code in place to handle the i8 case on x86-32. llvm-svn: 55078
* Simplify FastISel's constructor argument list, make the FastISelDan Gohman2008-08-203-11/+4
| | | | | | | | class hold a MachineRegisterInfo member, and make the MachineBasicBlock be passed in to SelectInstructions rather than the FastISel constructor. llvm-svn: 55076
* Clean up a dead return missed in r55055.Dan Gohman2008-08-201-3/+2
| | | | llvm-svn: 55057
* Tablegen generated code already tests the opcode value, so it's notDan Gohman2008-08-204-247/+183
| | | | | | necessary to use dyn_cast in these predicates. llvm-svn: 55055
* Use cast instead of dyn_cast.Dan Gohman2008-08-201-2/+2
| | | | llvm-svn: 55052
* Fix comment spacing.Dan Gohman2008-08-201-1/+1
| | | | llvm-svn: 55047
* Add remaining 64-bit atomic patterns for x86-64.Dale Johannesen2008-08-202-0/+60
| | | | llvm-svn: 55029
* Revert r55018 and apply the correct "fix" for the 64-bit sub_and_fetch atomic.Bill Wendling2008-08-204-51/+5
| | | | | | Just expand it like the other X-bit sub_and_fetches. llvm-svn: 55023
* Add support for the __sync_sub_and_fetch atomics and friends for X86. The codeBill Wendling2008-08-193-6/+54
| | | | | | was already present, but not hooked up to anything. llvm-svn: 55018
* Instantiate FastISel for X86.Dan Gohman2008-08-193-2/+56
| | | | llvm-svn: 55011
* The X86 target will soon have an implementation of createFastISel.Dan Gohman2008-08-192-0/+14
| | | | llvm-svn: 55010
* Add support for 8 and 16 bit forms of __syncDale Johannesen2008-08-194-23/+143
| | | | | | | | | | builtins on X86. Change "lock" instructions to be on a separate line. This is needed to work around a bug in the Darwin assembler. llvm-svn: 54999
* add a noteChris Lattner2008-08-191-0/+17
| | | | llvm-svn: 54985
* add a noteChris Lattner2008-08-191-0/+37
| | | | llvm-svn: 54964
* remove empty fileChris Lattner2008-08-181-0/+0
| | | | llvm-svn: 54950
* Unbreak cpp backend: upgrade output due to change in APInt APIAnton Korobeynikov2008-08-181-1/+2
| | | | llvm-svn: 54942
* ARM asm printer can't handle dwarf info yet.Evan Cheng2008-08-181-6/+12
| | | | llvm-svn: 54913
* Fix a (u)comiss intrinsic lowering bug. It was using anyext which can return ↵Evan Cheng2008-08-172-2/+4
| | | | | | junk in higher bits. Patch by Nate Begeman. llvm-svn: 54903
* Don't require Registry specializations to define random static variables.Gordon Henriksen2008-08-171-7/+0
| | | | llvm-svn: 54902
* Rename some GC classes so that their roll will hopefully be clearer.Gordon Henriksen2008-08-173-4/+4
| | | | | | | | | | | | | | | | | | In particular, Collector was confusing to implementors. Several thought that this compile-time class was the place to implement their runtime GC heap. Of course, it doesn't even exist at runtime. Specifically, the renames are: Collector -> GCStrategy CollectorMetadata -> GCFunctionInfo CollectorModuleMetadata -> GCModuleInfo CollectorRegistry -> GCRegistry Function::getCollector -> getGC (setGC, hasGC, clearGC) Several accessors and nested types have also been renamed to be consistent. These changes should be obvious. llvm-svn: 54899
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