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* Do not use 'cpp' directlyChris Lattner2003-07-291-1/+1
| | | | llvm-svn: 7404
* Add namespace specifier, add flags used by the X86 BEChris Lattner2003-07-291-5/+7
| | | | llvm-svn: 7403
* * Cleaned up and corrected comments wrt instruction formatsMisha Brukman2003-07-291-18/+18
| | | | | | * Enabled STXFSR instructions llvm-svn: 7400
* Make emitFarCall() public, and add a few comments to functions.Misha Brukman2003-07-291-3/+27
| | | | llvm-svn: 7399
* Unify all constant evaluations that depend on register sizeVikram S. Adve2003-07-292-72/+104
| | | | | | in ConvertConstantToIntType. llvm-svn: 7395
* Rename 'dump-asm' to 'dump-input' and really print it just before code-gen.Vikram S. Adve2003-07-291-6/+6
| | | | llvm-svn: 7394
* Bug fix: don't unnecessarily pretty-print control-characters, some ofVikram S. Adve2003-07-291-15/+4
| | | | | | which were wrong (particularly, '\a' for '\007'). llvm-svn: 7393
* Add ConvertConstantToIntType() to unify all constant handlingVikram S. Adve2003-07-291-50/+16
| | | | | | | | | that depends on machine register size. Moved insertCallerSavingCode() to PhyRegAlloc and moved isRegVolatile and modifiedByCall to TargetRegInfo: they are all machine independent. Remove several dead functions. llvm-svn: 7392
* Add code to support stack spill/temp offsets that don't fit in theVikram S. Adve2003-07-291-238/+99
| | | | | | | immed. field. Moved insertCallerSavingCode() to PhyRegAlloc: it is now machine independent. Remove all uses of PhyRegAlloc. llvm-svn: 7391
* * Correctly emit a far call if the target address does not fit into 30 bitsMisha Brukman2003-07-291-17/+15
| | | | | | | instead of assert()ing * Fixed a nasty bug where '07' was used instead of register 'o7' llvm-svn: 7382
* Move "register flags" definition the type of registers to be fully fledgedChris Lattner2003-07-292-40/+41
| | | | | | value types llvm-svn: 7377
* Specify the value type for the register, not just the size.Chris Lattner2003-07-281-1/+4
| | | | llvm-svn: 7357
* Instead of specifying the SIZE of the register, go so far as to specifyChris Lattner2003-07-281-1/+16
| | | | | | what value type it is. llvm-svn: 7356
* Rename function to be more consistent with filenameChris Lattner2003-07-263-6/+6
| | | | llvm-svn: 7352
* We don't modify the LLVM rep, remain const correctChris Lattner2003-07-261-2/+2
| | | | llvm-svn: 7345
* If the pass changes _anything_ it must return trueChris Lattner2003-07-261-1/+2
| | | | llvm-svn: 7344
* This code doesn't modify the LLVM structure, keep stuff constChris Lattner2003-07-263-6/+6
| | | | llvm-svn: 7343
* (1) Major fix to the way unused regs. are marked and found for the FPVikram S. Adve2003-07-254-566/+140
| | | | | | | | | | | | | Single and FP double reg types (which share the same reg class). Now all methods marking/finding unused regs consider the regType within the reg class, and SparcFloatRegClass specializes this code. (2) Remove machine-specific regalloc. methods that are no longer needed. In particular, arguments and return value from a call do not need machine-specific code for allocation. (3) Rename TargetRegInfo::getRegType variants to avoid unintentional overloading when an include file is omitted. llvm-svn: 7334
* 1. Fix a case that was marking the invalid reg. num. (-1) as used,Vikram S. Adve2003-07-251-14/+35
| | | | | | | | causing a nasty array bound error later. 2. Fix silly typo causing logical shift of unsigned long to use SRL instead of SRLX. llvm-svn: 7330
* Use unified CWriter-X86/Printer name mangler. Do not bother usingBrian Gaeke2003-07-241-88/+28
| | | | | | | SlotCalculator in CWriter. (Unfortunately, all this means a lot of X86/Printer's methods have to be de-constified again. Oh well.) llvm-svn: 7299
* It doesn't appear that we need to #include these.Brian Gaeke2003-07-241-3/+0
| | | | llvm-svn: 7291
* Constify most methods. We could have constified doInitialization andBrian Gaeke2003-07-241-16/+25
| | | | | | | | | | | doFinalization too except that would have made them shadow, not override, the parent class :-P. Allow *any* constant cast expression between pointers and longs, or vice-versa, or any widening (not just same-size) conversion that isLosslesslyConvertibleTo approves. This fixes oopack. llvm-svn: 7288
* Printer.cpp: Ditch addRequired/getAnalysis, because they leaveBrian Gaeke2003-07-233-61/+58
| | | | | | | | | | | Printer::doFinalization() out in the cold. Now we pass in a TargetMachine to Printer's constructor and get the TargetData from the TargetMachine. Don't pass TargetMachine or MRegisterInfo objects around in the Printer. Constify TargetData references. X86.h: Update comment and prototype of createX86CodePrinterPass(). X86TargetMachine.cpp: Update callers of createX86CodePrinterPass(). llvm-svn: 7275
* Add, rewrite, and/or reformat many comments.Brian Gaeke2003-07-231-80/+120
| | | | | | | | | | | | | | | | | | | | Stop passing ostreams around: we already have one perfectly good ostream and we can all share it. Stop stashing a pointer to TargetData in the Pass object, because that will lead to a crash if there are no functions in the module (ouch!) Instead, use addRequired() and getAnalysis(), like we always should have done. Move the check for ConstantExpr up before the check for isPrimitiveType, because we need to be able to catch e.g. ubyte (cast bool false to ubyte), whose type is primitive but which is nevertheless a ConstantExpr, by calling our specialized handler instead of the AsmWriter. This would result in assembler errors when we would try to output something like ".byte (cast bool false to ubyte)". GC some unused variable declarations. llvm-svn: 7265
* Remove redundant const qualifiers from cast<> expressionsChris Lattner2003-07-232-3/+3
| | | | llvm-svn: 7253
* Simplify code by using ConstantInt::getRawValue instead of checking to seeChris Lattner2003-07-234-52/+18
| | | | | | whether the constant is signed or unsigned, then casting llvm-svn: 7252
* Simplify code a bitChris Lattner2003-07-211-9/+9
| | | | llvm-svn: 7217
* Added special consideration for instrumentation strategyAnand Shukla2003-07-203-0/+24
| | | | llvm-svn: 7208
* Please, save your applause^H^H^H^H^H^H^H^Hflames for the end...Brian Gaeke2003-07-181-3/+6
| | | | | | | | | | | | | | | | Avoid a fall-through in the (stubby) treatment of the longjmp intrinsic call which causes llc & lli to core-dump. Add a sort-of treatment of cast double to ulong. I am not really sure what a user should expect to see upon casting a negative FP value to unsigned long long. But with what is given here, I was able to write a program that could cast -123.456 to ulong and back and get -123.0, which seems like a step in the right direction. GCC seems to give you 0. I don't know if I'd consider that useful. These cases were coming up in GNU coreutils-5.0. llvm-svn: 7205
* Use getClassB for load and store; we don't want to abort when weBrian Gaeke2003-07-171-2/+2
| | | | | | try to load or store through a bool*. llvm-svn: 7195
* Fixed the number translation scheme for the integer condition code registers: itMisha Brukman2003-07-162-32/+8
| | | | | | | | | | now works in instructions which require a 2-bit or 3-bit INTcc code. Incidentally, that means that the representation of INTcc registers is now the same in both integer and FP instructions. Thus, code became much simpler and cleaner. llvm-svn: 7185
* The name should really be `simm11' to follow the naming convention, but this hasMisha Brukman2003-07-161-2/+2
| | | | | | no change in functionality. llvm-svn: 7184
* No need for a second immediate field if the class already inherits one.Misha Brukman2003-07-151-2/+1
| | | | llvm-svn: 7182
* Encode predict = 1 by default, because the Sparc assembler does this.Misha Brukman2003-07-151-4/+4
| | | | llvm-svn: 7181
* Correctly handle calls to functions which are further away than 2**32 bits willMisha Brukman2003-07-152-6/+97
| | | | | | | | | | | | allow, i.e. make a sequence of instructions to enable an indirect call using jump-and-link and 2 temporary registers (which we save and ultimately restore). Warning: if the delay slot of a function call is used to do meaningful work and not just a NOP, this behavior is incorrect. However, the Sparc backend does not yet utilize the delay slots effectively, so it is not necessary to make an overly complicated algorithm for something that's not used. llvm-svn: 7178
* * Added support for the %ccr registerMisha Brukman2003-07-142-77/+24
| | | | | | | | * FP double registers are now coded correctly * Removed function which converted registers based on register types, it was broken (because regTypes are broken) llvm-svn: 7175
* The word `separate' only has one `e'.Misha Brukman2003-07-141-1/+1
| | | | llvm-svn: 7173
* If we have a constant pointer reference to a function, we were printingBrian Gaeke2003-07-111-1/+22
| | | | | | | | out the entire llvm disassembly for the function at global constant-output time, which caused the assembler to barf in 164.gzip. This fixes that particular problem (though 164.gzip has other problems with X86 llc.) llvm-svn: 7168
* Fix some serious floating-point bugs (fixes test cases such as Oscar,Brian Gaeke2003-07-112-26/+75
| | | | | | | | | | | | | | Fhourstones, McCat-vor, and many others...) Printer.cpp: Print implicit uses for AddRegFrm instructions. Break gas bug workarounds up into separate stanzas of code for each bug. Add new workarounds for fild and fistp. X86InstrInfo.def: Add O_ST0 implicit uses for more FP instrs where they obviously apply. Also add PrintImplUses flags for FP instrs where they are necessary for gas to understand the output. llvm-svn: 7165
* Several important bug fixes:Vikram S. Adve2003-07-101-160/+474
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | (1) Cannot use ANDN(ot), ORN, and XORN for boolean ops, only bitwise ops. (2) Conditional move instructions must distinguish signed and unsigned condition codes, e.g., MOVLE vs. MOVLEU. (3) Conditional-move-on-register was using the cond-move-on-cc opcodes, which produces a valid-looking instruction with bogus registers! (4) Here's a really cute one: dividing-by-2^k for negative numbers needs to add 2^k-1 before shifting, not add 1 after shifting. Sadly, these are the same when k=0 so our poor test case worked fine. (5) Casting between signed and unsigned values was not correct: completely reimplemented. (6) Zero-extension on unsigned values was bogus: I was only doing the SRL and not the SLLX before it. Don't know WHAT I was thinking! (7) And the most important class of changes: Sign-extensions on signed values. Signed values are not sign-extended after ordinary operations, so they must be sign-extended before the following cases: -- passing to an external or unknown function -- returning from a function -- using as operand 2 of DIV or REM -- using as either operand of condition-code setting operation (currently only SUBCC), with smaller than 32-bit operands Also, a couple of improvements: (1) Fold cast-to-bool into Not(bool). Need to do this for And, Or, XOR also. (2) Convert SetCC-Const into a conditional-move-on-register (case 41) if the constant is 0. This was only being done for branch-on-SetCC-Const when the branch is folded with the SetCC-Const. llvm-svn: 7159
* Bug fix in creating constants: need 1U << 31, not 1 << 31.Vikram S. Adve2003-07-101-1/+1
| | | | llvm-svn: 7158
* Fold cast-to-bool into not. Later, this should also be folded into otherVikram S. Adve2003-07-101-0/+1
| | | | | | boolean operations: AND, OR, XOR. llvm-svn: 7157
* Several fixes to handling of int CC register:Vikram S. Adve2003-07-103-179/+48
| | | | | | | | | | | | | | | | | | | | (1) An int CC live range must be spilled if there are any interferences, even if no other "neighbour" in the interf. graph has been allocated that reg. yet. This is actually true of any class with only one reg! (2) SparcIntCCRegClass::colorIGNode sets the color even if the LR must be spilled so that the machine-independent spill code doesn't have to make the machine-dependent decision of which CC name to use based on operand type: %xcc or %icc. (These are two halves of the same register.) (3) LR->isMarkedForSpill() is no longer the same as LR->hasColor(). These should never have been the same, and this is necessary now for #2. (4) All RDCCR and WRCCR instructions are directly generated with the phony number for %ccr so that EmitAssembly/EmitBinary doesn't have to deal with this. llvm-svn: 7151
* Elaborated assembly syntax of instructions in the comments.Misha Brukman2003-07-071-65/+64
| | | | llvm-svn: 7120
* Removed unnecessary assignment (it was taken care by a superclass) and clarifiedMisha Brukman2003-07-071-6/+5
| | | | | | some comments. llvm-svn: 7119
* Insert workaround for GAS bug in assembling FLD/FSTP XWORD PTR [...]Brian Gaeke2003-07-071-2/+31
| | | | | | instructions, by outputting them as bytes. llvm-svn: 7115
* Moved RegClassIDs enum to be next to the RegTypes enum.Misha Brukman2003-07-071-14/+14
| | | | llvm-svn: 7114
* Correction to last fix: Pointer types do not return true in Type::IsIntegral().Vikram S. Adve2003-07-061-6/+9
| | | | llvm-svn: 7113
* Major bug fix though it happened rarely (only on a compare after anVikram S. Adve2003-07-065-37/+82
| | | | | | | | integer overflow): We need to use %icc and not %xcc for comparisons on 32-bit or smaller integer values. llvm-svn: 7111
* Make the RegClassID values public -- there is no other way to get them.Vikram S. Adve2003-07-061-4/+6
| | | | llvm-svn: 7109
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