summaryrefslogtreecommitdiffstats
path: root/llvm/lib/Target
Commit message (Collapse)AuthorAgeFilesLines
* Renamed MCInstFragment to MCRelaxableFragment and added some comments.Eli Bendersky2013-01-086-9/+9
| | | | | | No change in functionality. llvm-svn: 171822
* ARM: Copy-paste error.Jim Grosbach2013-01-071-1/+1
| | | | llvm-svn: 171790
* ARM: Fix a few copy-paste errors.Jim Grosbach2013-01-072-3/+3
| | | | | | s/X86/ARM/ llvm-svn: 171789
* This patch addresses bug 14678 by fixing two problems in medium code modelBill Schmidt2013-01-072-12/+29
| | | | | | | | | code generation. Variables addressed through a GlobalAlias were not being handled, and variables with available_externally linkage were treated incorrectly. The patch contains two new tests to verify the correct code generation for these cases. llvm-svn: 171778
* Change SMRange to be half-open (exclusive end) instead of closed (inclusive)Jordan Rose2013-01-074-157/+165
| | | | | | | | | | This is necessary not only for representing empty ranges, but for handling multibyte characters in the input. (If the end pointer in a range refers to a multibyte character, should it point to the beginning or the end of the character in a char array?) Some of the code in the asm parsers was already assuming this anyway. llvm-svn: 171765
* R600/SIISelLowering.cpp: Suppress a warning. [-Wunused-variable]NAKAMURA Takumi2013-01-071-3/+2
| | | | llvm-svn: 171728
* Add LICENSE.TXT covering contributions made by ARM.Tim Northover2013-01-071-0/+47
| | | | | | | | | | Absent a Contributor's License Agreement (CLA) with an LLVM legal entity and as reviewed and agreed with Chris Lattner, add a patent license covering future contributions from ARM until there is a CLA. This is to make explicit ARM's grant of patent rights to recipients of LLVM containing ARM-contributed material. llvm-svn: 171721
* Remove more unnecessary # operators with nothing to paste proceeding them.Craig Topper2013-01-072-40/+40
| | | | llvm-svn: 171702
* Remove # from the beginning and end of def names. The # is a paste operator ↵Craig Topper2013-01-074-93/+93
| | | | | | and should only be used with something to paste on either side. llvm-svn: 171697
* Remove # from the beginning and end of def names.Craig Topper2013-01-074-283/+283
| | | | llvm-svn: 171696
* Remove unnecessary # tokens at the beginning and end of defm names.Craig Topper2013-01-071-10/+10
| | | | llvm-svn: 171694
* Fix the enumerator names for ShuffleKind to match tho coding standards,Chandler Carruth2013-01-071-1/+1
| | | | | | and make its comments doxygen comments. llvm-svn: 171688
* Make the popcnt support enums and methods have more clear names andChandler Carruth2013-01-071-3/+3
| | | | | | | follow the conding conventions regarding enumerating a set of "kinds" of things. llvm-svn: 171687
* Move TargetTransformInfo to live under the Analysis library. This noChandler Carruth2013-01-072-2/+2
| | | | | | | longer would violate any dependency layering and it is in fact an analysis. =] llvm-svn: 171686
* Switch TargetTransformInfo from an immutable analysis pass that requiresChandler Carruth2013-01-0732-859/+527
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | a TargetMachine to construct (and thus isn't always available), to an analysis group that supports layered implementations much like AliasAnalysis does. This is a pretty massive change, with a few parts that I was unable to easily separate (sorry), so I'll walk through it. The first step of this conversion was to make TargetTransformInfo an analysis group, and to sink the nonce implementations in ScalarTargetTransformInfo and VectorTargetTranformInfo into a NoTargetTransformInfo pass. This allows other passes to add a hard requirement on TTI, and assume they will always get at least on implementation. The TargetTransformInfo analysis group leverages the delegation chaining trick that AliasAnalysis uses, where the base class for the analysis group delegates to the previous analysis *pass*, allowing all but tho NoFoo analysis passes to only implement the parts of the interfaces they support. It also introduces a new trick where each pass in the group retains a pointer to the top-most pass that has been initialized. This allows passes to implement one API in terms of another API and benefit when some other pass above them in the stack has more precise results for the second API. The second step of this conversion is to create a pass that implements the TargetTransformInfo analysis using the target-independent abstractions in the code generator. This replaces the ScalarTargetTransformImpl and VectorTargetTransformImpl classes in lib/Target with a single pass in lib/CodeGen called BasicTargetTransformInfo. This class actually provides most of the TTI functionality, basing it upon the TargetLowering abstraction and other information in the target independent code generator. The third step of the conversion adds support to all TargetMachines to register custom analysis passes. This allows building those passes with access to TargetLowering or other target-specific classes, and it also allows each target to customize the set of analysis passes desired in the pass manager. The baseline LLVMTargetMachine implements this interface to add the BasicTTI pass to the pass manager, and all of the tools that want to support target-aware TTI passes call this routine on whatever target machine they end up with to add the appropriate passes. The fourth step of the conversion created target-specific TTI analysis passes for the X86 and ARM backends. These passes contain the custom logic that was previously in their extensions of the ScalarTargetTransformInfo and VectorTargetTransformInfo interfaces. I separated them into their own file, as now all of the interface bits are private and they just expose a function to create the pass itself. Then I extended these target machines to set up a custom set of analysis passes, first adding BasicTTI as a fallback, and then adding their customized TTI implementations. The fourth step required logic that was shared between the target independent layer and the specific targets to move to a different interface, as they no longer derive from each other. As a consequence, a helper functions were added to TargetLowering representing the common logic needed both in the target implementation and the codegen implementation of the TTI pass. While technically this is the only change that could have been committed separately, it would have been a nightmare to extract. The final step of the conversion was just to delete all the old boilerplate. This got rid of the ScalarTargetTransformInfo and VectorTargetTransformInfo classes, all of the support in all of the targets for producing instances of them, and all of the support in the tools for manually constructing a pass based around them. Now that TTI is a relatively normal analysis group, two things become straightforward. First, we can sink it into lib/Analysis which is a more natural layer for it to live. Second, clients of this interface can depend on it *always* being available which will simplify their code and behavior. These (and other) simplifications will follow in subsequent commits, this one is clearly big enough. Finally, I'm very aware that much of the comments and documentation needs to be updated. As soon as I had this working, and plausibly well commented, I wanted to get it committed and in front of the build bots. I'll be doing a few passes over documentation later if it sticks. Commits to update DragonEgg and Clang will be made presently. llvm-svn: 171681
* Fix suffix handling for parsing and printing of cvtsi2ss, cvtsi2sd, ↵Craig Topper2013-01-061-27/+100
| | | | | | | | | | | cvtss2si, cvttss2si, cvtsd2si, and cvttsd2si to match gas behavior. cvtsi2* should parse with an 'l' or 'q' suffix or no suffix at all. No suffix should be treated the same as 'l' suffix. Printing should always print a suffix. Previously we didn't parse or print an 'l' suffix. cvtt*2si/cvt*2si should parse with an 'l' or 'q' suffix or not suffix at all. No suffix should use the destination register size to choose encoding. Printing should not print a suffix. Original 'l' suffix issue with cvtsi2* pointed out by Michael Kuperstein. llvm-svn: 171668
* Fix for PR14739. It's not safe to fold a load into a call across a store. ↵Evan Cheng2013-01-061-0/+5
| | | | | | Thanks to Nick Lewycky for the initial patch. llvm-svn: 171665
* Convert the TargetTransformInfo from an immutable pass with dynamicChandler Carruth2013-01-051-1/+0
| | | | | | | | | | | | | | | | | | | | | | | | | interfaces which could be extracted from it, and must be provided on construction, to a chained analysis group. The end goal here is that TTI works much like AA -- there is a baseline "no-op" and target independent pass which is in the group, and each target can expose a target-specific pass in the group. These passes will naturally chain allowing each target-specific pass to delegate to the generic pass as needed. In particular, this will allow a much simpler interface for passes that would like to use TTI -- they can have a hard dependency on TTI and it will just be satisfied by the stub implementation when that is all that is available. This patch is a WIP however. In particular, the "stub" pass is actually the one and only pass, and everything there is implemented by delegating to the target-provided interfaces. As a consequence the tools still have to explicitly construct the pass. Switching targets to provide custom passes and sinking the stub behavior into the NoTTI pass is the next step. llvm-svn: 171621
* Recommit r171461 which was incorrectly reverted. Mark DIV/IDIV instructions ↵Craig Topper2013-01-051-1/+1
| | | | | | hasSideEffects=1 because they can trap when dividing by 0. This is needed to keep early if conversion from moving them across basic blocks. llvm-svn: 171608
* Revert revision 171524. Original message:Nadav Rotem2013-01-057-206/+3
| | | | | | | | | | | | | | | | | | | | URL: http://llvm.org/viewvc/llvm-project?rev=171524&view=rev Log: The current Intel Atom microarchitecture has a feature whereby when a function returns early then it is slightly faster to execute a sequence of NOP instructions to wait until the return address is ready, as opposed to simply stalling on the ret instruction until the return address is ready. When compiling for X86 Atom only, this patch will run a pass, called "X86PadShortFunction" which will add NOP instructions where less than four cycles elapse between function entry and return. It includes tests. Patch by Andy Zhang. llvm-svn: 171603
* Refactor the ScalarTargetTransformInfo API for querying about theChandler Carruth2013-01-051-2/+8
| | | | | | | | | | | | legality of an address mode to not use a struct of four values and instead to accept them as parameters. I'd love to have named parameters here as most callers only care about one or two of these, but the defaults aren't terribly scary to write out. That said, there is no real impact of this as the passes aren't yet using STTI for this and are still relying upon TargetLowering. llvm-svn: 171595
* [mips] Fix data layout string. Add 64 to the list of native integer widthsAkira Hatanaka2013-01-051-4/+6
| | | | | | and add stack alignment information. llvm-svn: 171587
* Move 'break' to the right place to prevent fallthru. There is no test-caseJakub Staszak2013-01-041-1/+1
| | | | | | because conditions in the next case prevented from doing anything nasty. llvm-svn: 171549
* The current Intel Atom microarchitecture has a feature whereby when a functionPreston Gurd2013-01-047-3/+206
| | | | | | | | | | | | | | | | | returns early then it is slightly faster to execute a sequence of NOP instructions to wait until the return address is ready, as opposed to simply stalling on the ret instruction until the return address is ready. When compiling for X86 Atom only, this patch will run a pass, called "X86PadShortFunction" which will add NOP instructions where less than four cycles elapse between function entry and return. It includes tests. Patch by Andy Zhang. llvm-svn: 171524
* [mips] MipsTargetLowering::getSetCCResultType should return a vector type ifAkira Hatanaka2013-01-041-1/+3
| | | | | | vectors are being compared. llvm-svn: 171517
* [mips] 80 columns.Akira Hatanaka2013-01-044-8/+14
| | | | llvm-svn: 171515
* [mips] Reorder template parameters. Remove class shift_rotate_imm32 andAkira Hatanaka2013-01-042-54/+59
| | | | | | shift_rotate_imm64. llvm-svn: 171513
* [mips] Refactor conditional move instructions.Akira Hatanaka2013-01-041-13/+20
| | | | llvm-svn: 171511
* [mips] Refactor instructions which move data from or to coprocessors.Akira Hatanaka2013-01-043-33/+34
| | | | llvm-svn: 171510
* PowerPC: Fix eh_frame relocation for PIC Adhemerval Zanella2013-01-041-0/+5
| | | | | | | | | This patch fixes the PPC eh_frame definitions for the personality and frame unwinding for PIC objects. It makes PIC build correctly creates relative relocations in the '.rela.eh_frame' segments and thus avoiding a text relocation that generates a DT_TEXTREL segments in link phase. llvm-svn: 171506
* Change the default number of registers to prevent unrolling on targets that ↵Nadav Rotem2013-01-041-1/+1
| | | | | | dont have this hook. llvm-svn: 171489
* LoopVectorizer:Nadav Rotem2013-01-043-0/+13
| | | | | | | | 1. Add code to estimate register pressure. 2. Add code to select the unroll factor based on register pressure. 3. Add bits to TargetTransformInfo to provide the number of registers. llvm-svn: 171469
* Revert revision: 171467. This transformation is incorrect and makes some ↵Nadav Rotem2013-01-041-20/+3
| | | | | | | | | tests fail. Original message: Simplified TRUNCATE operation that comes after SETCC. It is possible since SETCC result is 0 or -1. Added a test. llvm-svn: 171468
* Simplified TRUNCATE operation that comes after SETCC. It is possible since ↵Elena Demikhovsky2013-01-031-3/+20
| | | | | | | | SETCC result is 0 or -1. Added a test. llvm-svn: 171467
* Revert "Mark DIV/IDIV instructions hasSideEffects=1 because they can trap ↵Michael Gottesman2013-01-031-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | when dividing by 0. This is needed to keep early if conversion from moving them across basic blocks." This reverts commit r171461 since it breaks the following tests: Clang :: Analysis/outofbound-notwork.c Clang :: Analysis/string-fail.c Clang :: CXX/basic/basic.lookup/basic.lookup.qual/p6-0x.cpp Clang :: CXX/basic/basic.lookup/basic.lookup.unqual/p15.cpp Clang :: CXX/dcl.dcl/dcl.spec/dcl.fct.spec/p4.cpp Clang :: CXX/dcl.dcl/dcl.spec/dcl.stc/p10.cpp Clang :: CXX/temp/temp.param/p14.cpp Clang :: CXX/temp/temp.res/temp.dep.res/temp.point/p1.cpp Clang :: CodeGen/2009-02-13-zerosize-union-field-ppc.c Clang :: CodeGen/blocks-2.c Clang :: CodeGen/libcalls-d.c Clang :: CodeGen/libcalls-ld.c Clang :: CodeGenCXX/conversion-function.cpp Clang :: CodeGenCXX/debug-info-limit-type.cpp Clang :: CodeGenCXX/inheriting-constructor.cpp Clang :: FixIt/fixit-errors.c Clang :: FixIt/fixit-pmem.cpp Clang :: Modules/namespaces.cpp Clang :: PCH/changed-files.c Clang :: PCH/pr4489.c Clang :: PCH/source-manager-stack.c Clang :: Parser/cxx-ambig-decl-expr-xfail.cpp Clang :: SemaCXX/switch-implicit-fallthrough-cxx98.cpp Clang :: SemaTemplate/instantiate-function-1.mm llvm-svn: 171466
* Mark DIV/IDIV instructions hasSideEffects=1 because they can trap when ↵Craig Topper2013-01-031-1/+1
| | | | | | dividing by 0. This is needed to keep early if conversion from moving them across basic blocks. llvm-svn: 171461
* Add a subtype parameter to VTTI::getShuffleCostHal Finkel2013-01-033-5/+6
| | | | | | | | | In order to cost subvector insertion and extraction, we need to know the type of the subvector being extracted. No functionality change. llvm-svn: 171453
* Adds missing aliases for fcom and fcomp instructions without arguments.Kevin Enderby2013-01-021-0/+2
| | | | | | Patch by Michael M Kuperstein! llvm-svn: 171414
* AVX: Fix a bug in WidenMaskArithmetic.Nadav Rotem2013-01-021-1/+1
| | | | llvm-svn: 171398
* Move all of the header files which are involved in modelling the LLVM IRChandler Carruth2013-01-02151-372/+372
| | | | | | | | | | | | | | | | | | | | | into their new header subdirectory: include/llvm/IR. This matches the directory structure of lib, and begins to correct a long standing point of file layout clutter in LLVM. There are still more header files to move here, but I wanted to handle them in separate commits to make tracking what files make sense at each layer easier. The only really questionable files here are the target intrinsic tablegen files. But that's a battle I'd rather not fight today. I've updated both CMake and Makefile build systems (I think, and my tests think, but I may have missed something). I've also re-sorted the includes throughout the project. I'll be committing updates to Clang, DragonEgg, and Polly momentarily. llvm-svn: 171366
* Resort the #include lines in include/... and lib/... with theChandler Carruth2013-01-0226-33/+28
| | | | | | | | | | utils/sort_includes.py script. Most of these are updating the new R600 target and fixing up a few regressions that have creeped in since the last time I sorted the includes. llvm-svn: 171362
* Merge SSE and AVX instruction definitions for scalar forms of SQRT, RSQRT, ↵Craig Topper2013-01-021-82/+97
| | | | | | and RCP. llvm-svn: 171356
* Merge SSE and AVX instruction definitions for PSHUFD/PSHUFHW/PSHUFLW.Craig Topper2013-01-021-62/+61
| | | | llvm-svn: 171355
* Revert 171351. It broke MC/X86/x86-32-avx.s.Rafael Espindola2013-01-021-97/+82
| | | | llvm-svn: 171352
* Merge SSE and AVX instruction definitions for scalar forms of SQRT, RSQRT, ↵Craig Topper2013-01-011-82/+97
| | | | | | and RCP. llvm-svn: 171351
* Remove unused argument from a multiclass.Craig Topper2013-01-011-5/+3
| | | | llvm-svn: 171340
* Merge intrinsic instruction definitions for SSE and AVX versions of RCPPS ↵Craig Topper2013-01-011-30/+34
| | | | | | and RSQRTPS. llvm-svn: 171339
* Remove 2 unused multiclasses.Craig Topper2013-01-011-26/+0
| | | | llvm-svn: 171338
* Merge AVX/SSE instruction definitions for SQRTPS/PD, RSQRTPS, RCPPS. No ↵Craig Topper2013-01-011-47/+58
| | | | | | funcitonal change intended. llvm-svn: 171337
* Use packed instead of scalar itineraries for SSE1/2 SQRTPS/PD, RCPPS, and ↵Craig Topper2012-12-311-6/+6
| | | | | | RSQRTPS. VEX-encoded forms already use packed. llvm-svn: 171336
OpenPOWER on IntegriCloud