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* trailing whitespaceJim Grosbach2010-11-031-2/+2
| | | | llvm-svn: 118199
* Optimize generated code for integer materialization a bit.Eric Christopher2010-11-031-1/+13
| | | | llvm-svn: 118192
* Unlike a lot of NEON instructions, vext isn't _actually_ parameterized by ↵Owen Anderson2010-11-031-9/+31
| | | | | | | | | element size. Instead, all of the different element sizes are pseudo instructions that map down to vext.8 underneath, with the immediate shifted left to reflect the increased element size. llvm-svn: 118183
* Add codegen patterns for VST1-lane instructions. Radar 8599955.Bob Wilson2010-11-031-8/+17
| | | | llvm-svn: 118176
* Check for extractelement with a variable operand for the element number.Bob Wilson2010-11-031-10/+15
| | | | | | For NEON we had been assuming this was always an immediate constant. llvm-svn: 118175
* Simplify uses of MVT and EVT. An MVT can be compared directlyDuncan Sands2010-11-035-13/+11
| | | | | | | with a SimpleValueType, while an EVT supports equality and inequality comparisons with SimpleValueType. llvm-svn: 118169
* Inside the calling convention logic LocVT is always a simpleDuncan Sands2010-11-0310-82/+83
| | | | | | | | | | value type, so there is no point in passing it around using an EVT. Use the simpler MVT everywhere. Rather than trying to propagate this information maximally in all the code that using the calling convention stuff, I chose to do a mainly low impact change instead. llvm-svn: 118167
* Fix preload instruction isel. Only v7 supports pli, and only v7 with mp ↵Evan Cheng2010-11-0310-36/+83
| | | | | | extension supports pldw. Add subtarget attribute to denote mp extension support and legalize illegal ones to nothing. llvm-svn: 118160
* Add support to match @llvm.prefetch to pld / pldw / pli. rdar://8601536.Evan Cheng2010-11-035-47/+47
| | | | llvm-svn: 118152
* Put the PC encoding in the correct bit position.Bill Wendling2010-11-031-1/+1
| | | | llvm-svn: 118151
* Invert these branches by default, it makes assembly comparisons a littleEric Christopher2010-11-031-2/+2
| | | | | | easier to read. llvm-svn: 118148
* The MC code couldn't handle ARM LDR instructions with negative offsets:Bill Wendling2010-11-036-52/+140
| | | | | | | | | | | | vldr.64 d1, [r0, #-32] The problem was with how the addressing mode 5 encodes the offsets. This change makes sure that the way offsets are handled in addressing mode 5 is consistent throughout the MC code. It involves re-refactoring the "getAddrModeImmOpValue" method into an "Imm12" and "addressing mode 5" version. But not to worry! The majority of the duplicated code has been unified. llvm-svn: 118144
* Remove unused function.Jim Grosbach2010-11-032-9/+0
| | | | llvm-svn: 118141
* Remove the no longer used 'Modifier' optional operand to the ARMJim Grosbach2010-11-032-17/+8
| | | | | | printOperand() asm printer helper functions. rdar://8425198 llvm-svn: 118140
* Remove unused function.Jim Grosbach2010-11-032-12/+0
| | | | llvm-svn: 118139
* Break ARM addrmode4 (load/store multiple base address) into its constituentJim Grosbach2010-11-039-104/+90
| | | | | | | parts. Represent the operation mode as an optional operand instead. rdar://8614429 llvm-svn: 118137
* Two sets of changes. Sorry they are intermingled.Evan Cheng2010-11-035-80/+99
| | | | | | | | | | | | | 1. Fix pre-ra scheduler so it doesn't try to push instructions above calls to "optimize for latency". Call instructions don't have the right latency and this is more likely to use introduce spills. 2. Fix if-converter cost function. For ARM, it should use instruction latencies, not # of micro-ops since multi-latency instructions is completely executed even when the predicate is false. Also, some instruction will be "slower" when they are predicated due to the register def becoming implicit input. rdar://8598427 llvm-svn: 118135
* Modify scheduling itineraries to correct instruction latencies (not operandEvan Cheng2010-11-032-314/+314
| | | | | | latencies) of loads. llvm-svn: 118134
* Make sure we're only storing a single bit here.Eric Christopher2010-11-021-2/+9
| | | | llvm-svn: 118126
* per a suggestion by Frits van Bommel, mark all MBlaze Pseudo Chris Lattner2010-11-023-5/+8
| | | | | | | instructions as isCodeGenOnly in the parent class instead of sprinkling it throughout the .td files. llvm-svn: 118125
* Revert r118097 to fix buildbots.Owen Anderson2010-11-022-203/+203
| | | | llvm-svn: 118121
* Completely reject instructions that have an operand in theirChris Lattner2010-11-022-38/+48
| | | | | | | | | | | | ins/outs list that isn't specified by their asmstring. Previously the asmmatcher would just force a 0 register into it, which clearly isn't right. Mark a bunch of ARM instructions that use this as isCodeGenOnly. Some of them are clearly pseudo instructions (like t2TBB) others use a weird hasExtraSrcRegAllocReq thing that will either need to be removed or the asmmatcher will need to be taught about it (someday). llvm-svn: 118119
* Obsessive formatting changes. No functionality impact.Bill Wendling2010-11-021-31/+37
| | | | llvm-svn: 118103
* Omit unused parameter name.Bill Wendling2010-11-021-1/+1
| | | | llvm-svn: 118099
* Simplify the EncodeInstruction method now that a lot of the special case stuffBill Wendling2010-11-021-13/+6
| | | | | | is handled with the MC encoder. llvm-svn: 118098
* Since these fields are not exactly equivalent to the encoded field, rename ↵Owen Anderson2010-11-022-203/+203
| | | | | | them to something with semantic meaning. llvm-svn: 118097
* Rename getAddrModeImm12OpValue to getAddrModeImmOpValue and expand it to workBill Wendling2010-11-024-50/+62
| | | | | | | | with immediates up to 16-bits in size. The same logic is applied to other LDR encodings, e.g. VLDR, but which use a different immediate bit width (8-bits in VLDR's case). Removing the "12" allows it to be more generic. llvm-svn: 118094
* Rename encoder methods to match naming convention.Owen Anderson2010-11-023-11/+8
| | | | llvm-svn: 118093
* mark a few codegenonly instructions.Chris Lattner2010-11-022-3/+3
| | | | llvm-svn: 118092
* Provide correct encodings for the remaining vst variants that we currently ↵Owen Anderson2010-11-021-53/+131
| | | | | | generate. llvm-svn: 118087
* Tentative encodings for the "single element from one lane" variant of vst1.Owen Anderson2010-11-021-14/+32
| | | | llvm-svn: 118084
* Add correct encodings for basic variants for vst3 and vst4.Owen Anderson2010-11-021-37/+47
| | | | llvm-svn: 118082
* Add NEON VST1-lane instructions. Partial fix for Radar 8599955.Bob Wilson2010-11-025-4/+80
| | | | llvm-svn: 118069
* Add correct encodings for the basic variants for vst2.Owen Anderson2010-11-021-30/+40
| | | | llvm-svn: 118068
* Add correct encodings for the basic form of vst1.Owen Anderson2010-11-021-54/+74
| | | | llvm-svn: 118067
* Factor out a common encoding class for loads and stores with a lane parameter.Owen Anderson2010-11-022-22/+18
| | | | llvm-svn: 118055
* Add correct encodings for the rest of the vld instructions that we generate.Owen Anderson2010-11-022-74/+182
| | | | llvm-svn: 118053
* Sort bit assignments. Cosmetic change only.Jim Grosbach2010-11-021-32/+31
| | | | llvm-svn: 118029
* Revert r114340 (improvements in Darwin function prologue/epilogue), as it brokeJim Grosbach2010-11-023-60/+169
| | | | | | assumptions about stack layout. Specifically, LR must be saved next to FP. llvm-svn: 118026
* Add correct NEON encodings for vld2, vld3, and vld4 basic variants.Owen Anderson2010-11-024-70/+103
| | | | llvm-svn: 117997
* Remove an assert - it's possible to be hit, and we just want to avoidEric Christopher2010-11-021-1/+1
| | | | | | handling those cases for now. llvm-svn: 117996
* WhitespeaceEric Christopher2010-11-021-1/+1
| | | | llvm-svn: 117995
* No really, no thumb1 for arm fast isel. Also add an informative comment asEric Christopher2010-11-021-3/+7
| | | | | | to what someone would need to do to support thumb1. llvm-svn: 117994
* Attempt to provide correct encodings for a number of other vld1 variants, ↵Owen Anderson2010-11-021-45/+59
| | | | | | | | which we can't test since we can neither generate nor parse them at the moment. llvm-svn: 117988
* Add aesthetic break.Owen Anderson2010-11-021-1/+1
| | | | llvm-svn: 117986
* Add correct NEON encodings for the "multiple single elements" form of vld.Owen Anderson2010-11-025-18/+53
| | | | llvm-svn: 117984
* Explicitly check for non-consant reference in an LDRi12 instruction. Add FIXMEJim Grosbach2010-11-011-1/+10
| | | | | | for handling the fixup necessary. llvm-svn: 117978
* Remove unused function.Jim Grosbach2010-11-011-13/+0
| | | | llvm-svn: 117977
* Add support for alignment operands on VLD1-lane instructions.Bob Wilson2010-11-012-25/+46
| | | | | | This is another part of the fix for Radar 8599955. llvm-svn: 117976
* Missed reverting this bit.Bill Wendling2010-11-011-1/+1
| | | | llvm-svn: 117971
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