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* fix a fixme: don't create an explicit "CStringSection" for ELF,Chris Lattner2009-08-041-9/+4
| | | | | | it is just being used as a prefix, so forward substitute it directly. llvm-svn: 78067
* Add support emiting for 2/4 byte mergable strings to the ".rodata.str*"Chris Lattner2009-08-041-12/+39
| | | | | | section on ELF targets. llvm-svn: 78066
* Ooops, I was too fast to commit the wrong fix :(Anton Korobeynikov2009-08-041-2/+2
| | | | llvm-svn: 78060
* Fix a typo - this unbreaks llvm-gcc build on armAnton Korobeynikov2009-08-041-2/+2
| | | | llvm-svn: 78059
* Thumb2 does not have ib (increment before) and da (decrement after) forms of ↵Evan Cheng2009-08-041-4/+10
| | | | | | ldm / stm. llvm-svn: 78057
* make MergeableCString be a SectionKind "abstract class", andChris Lattner2009-08-043-13/+37
| | | | | | | | add new concrete versions for 1/2/4-byte mergable strings. These are not actually created yet. llvm-svn: 78055
* No really, it's unused.Daniel Dunbar2009-08-041-2/+1
| | | | llvm-svn: 78047
* Remove now unused Module argument to createTargetMachine.Daniel Dunbar2009-08-045-16/+9
| | | | llvm-svn: 78043
* Remove ARM specific getInlineAsmLength. We'll rely on the simpler (and ↵Evan Cheng2009-08-042-163/+0
| | | | | | faster) generic algorithm for now. If more accurate computation is needed, we'll rely on the disassembler. llvm-svn: 78032
* Load / store multiple pass fixes for Thumb2. Not enabled yet.Evan Cheng2009-08-042-77/+88
| | | | llvm-svn: 78031
* Emit sub r, #c instead of transforming it to add r, #-c if c fits in 8-bit. ↵Evan Cheng2009-08-041-2/+9
| | | | | | This is a bit of pre-mature optimization. 8-bit variant makes it likely it will be narrowed to a 16-bit instruction. llvm-svn: 78030
* Lower Neon VLD* intrinsics to custom DAG nodes, and manually allocate theBob Wilson2009-08-043-1/+74
| | | | | | results to fixed registers. llvm-svn: 78025
* Minor cleanup. No functional changes intended.Bob Wilson2009-08-041-6/+5
| | | | llvm-svn: 78024
* Update CMake files.Ted Kremenek2009-08-032-0/+2
| | | | llvm-svn: 78020
* remove an unneeded section switch.Chris Lattner2009-08-031-1/+0
| | | | llvm-svn: 78014
* switch ppc to using SwitchToSection instead of textual section stuff.Chris Lattner2009-08-031-14/+43
| | | | llvm-svn: 78013
* use TLOF to compute the section for a function instead ofChris Lattner2009-08-031-5/+4
| | | | | | replicating the logic manually. llvm-svn: 78011
* convert macho stub emission to use SwitchToSection instead ofChris Lattner2009-08-031-34/+50
| | | | | | textual sections. llvm-svn: 78007
* hoist some common code out of a switchChris Lattner2009-08-031-3/+2
| | | | llvm-svn: 78006
* this really shouldn't switch sections without telling the asmprinter, butChris Lattner2009-08-031-1/+1
| | | | | | hey it uses .previous, so it should work :) llvm-svn: 78004
* Eliminate textual section switching from the x86 backend, oneChris Lattner2009-08-032-12/+33
| | | | | | more step towards "semantics sections" llvm-svn: 78002
* Lower CONCAT_VECTOR during legalization instead of matching it during isel.Bob Wilson2009-08-032-26/+19
| | | | | | Add a testcase. llvm-svn: 77992
* Minor stylistic cleanups in the Blackfin target.Jakob Stoklund Olesen2009-08-033-42/+46
| | | | | | Thanks Chris. llvm-svn: 77987
* remove a dead switch directive, replace it with someChris Lattner2009-08-031-1/+2
| | | | | | code that I will be using shortly. llvm-svn: 77983
* Remove neverHasSideEffects on MMX_MOVD64rrv164 since it has a matching pattern.Evan Cheng2009-08-031-2/+1
| | | | llvm-svn: 77978
* eliminate textual section switching from intel asm printer. Chris Lattner2009-08-031-15/+15
| | | | | | | This will cause it to enter the ".text" section instead of "_text" but masm is already broken. llvm-svn: 77977
* Change C, CBE, MSIL to not provide target data via getTargetData().Daniel Dunbar2009-08-033-3/+3
| | | | | | | - The theory is these should never actually be called, since these boil down to passes which can access the target data via the standard mechanism. llvm-svn: 77975
* llvm_report_error already prints "LLVM ERROR:". So stop reporting errors ↵Benjamin Kramer2009-08-031-1/+1
| | | | | | like "LLVM ERROR: llvm: error:" or "LLVM ERROR: ERROR:". llvm-svn: 77971
* Unbreak win64 compilation callback.Anton Korobeynikov2009-08-031-13/+14
| | | | | | | | Since we're generating stubs by hands we don't follow the ABI and don't create a register spill area. Don't use this area in compilation callback! llvm-svn: 77968
* Create proper frame index for FPAnton Korobeynikov2009-08-031-1/+3
| | | | llvm-svn: 77966
* Perform bitconvert to proper typeAnton Korobeynikov2009-08-031-2/+1
| | | | llvm-svn: 77965
* Add 'Indirect' LocInfo class and use to pass __m128 on win64. Also minore ↵Anton Korobeynikov2009-08-032-15/+27
| | | | | | fixes here and there (mostly __m64). llvm-svn: 77964
* Cleanup Darwin MMX calling conv stuff - make the stuff more generic. This ↵Anton Korobeynikov2009-08-032-62/+36
| | | | | | also fixes a subtle bug, when 6th v1i64 argument passed wrongly. llvm-svn: 77963
* Unbreak Win64 CC. Step one: honour register save area, fix some alignment ↵Anton Korobeynikov2009-08-037-54/+96
| | | | | | and provide a different set of call-clobberred registers. llvm-svn: 77962
* Use movd instead of movqRafael Espindola2009-08-031-2/+5
| | | | llvm-svn: 77956
* Remove now unused arguments from TargetRegistry::lookupTarget.Daniel Dunbar2009-08-031-5/+1
| | | | llvm-svn: 77950
* These are done.Evan Cheng2009-08-031-8/+0
| | | | llvm-svn: 77949
* Pass target triple string in to TargetMachine constructor.Daniel Dunbar2009-08-031-6/+11
| | | | | | | | | | | | | | | | | | | | | | | | | | This is not just a matter of passing in the target triple from the module; currently backends are making decisions based on the build and host architecture. The goal is to migrate to making these decisions based off of the triple (in conjunction with the feature string). Thus most clients pass in the target triple, or the host triple if that is empty. This has one important change in the way behavior of the JIT and llc. For the JIT, it was previously selecting the Target based on the host (naturally), but it was setting the target machine features based on the triple from the module. Now it is setting the target machine features based on the triple of the host. For LLC, -march was previously only used to select the target, the target machine features were initialized from the module's triple (which may have been empty). Now the target triple is taken from the module, or the host's triple is used if that is empty. Then the triple is adjusted to match -march. The take away is that -march for llc is now used in conjunction with the host triple to initialize the subtarget. If users want more deterministic behavior from llc, they should use -mtriple, or set the triple in the input module. llvm-svn: 77946
* Fix the instruction encoding.Rafael Espindola2009-08-031-2/+2
| | | | llvm-svn: 77944
* Remove a bitcast that was a no-op.Rafael Espindola2009-08-031-3/+1
| | | | | | Thanks to Eli Friedman for noticing it. llvm-svn: 77942
* Use movq to move 64 bits in and out of mmx registers.Rafael Espindola2009-08-032-3/+12
| | | | | | Fixes PR4669 llvm-svn: 77940
* Use the i12 variant of load / store opcodes if offset is zero. Now we pass ↵Evan Cheng2009-08-031-1/+5
| | | | | | all of multisource as well. llvm-svn: 77939
* Remove -disable-mips-abicall and -enable-mips-absolute-call command-line Eli Friedman2009-08-036-50/+26
| | | | | | | | | | | | | options, which don't appear to be useful. -enable-mips-absolute-call is completely unused (and unless I'm mistaken, is supposed to have the same effect that -relocation-model=dynamic-no-pic should have), and -disable-mips-abicall appears to be effectively a synonym for -relocation-model=static. Adjust the few users of hasABICall to checks which seem more appropriate. Update MipsSubtarget, MipsTargetMachine, and MipselTargetMachine to synchronize with recent changes. llvm-svn: 77938
* - s/DOUT/DEBUG(errs()/gBill Wendling2009-08-035-41/+43
| | | | | | - Tidy up some headers. llvm-svn: 77929
* Move most targets TargetMachine constructor to only taking a target triple.Daniel Dunbar2009-08-0229-126/+83
| | | | | | - The C, C++, MSIL, and Mips backends still need the module. llvm-svn: 77927
* Add extra SEXT pattern.Richard Osborne2009-08-021-0/+16
| | | | llvm-svn: 77920
* The x86 jit doesn't generate a def_cfa_offset unwind instruction after theBill Wendling2009-08-021-1/+1
| | | | | | | | | | | | | pushes in the function prolog if the function doesn't have any stack space, i.e. for a prolog like: 0x40011870: push %r15 0x40011872: push %r14 0x40011874: push %rbx Patch by Zoltan! llvm-svn: 77919
* Normalize Subtarget constructors to take a target triple string instead ofDaniel Dunbar2009-08-0237-98/+59
| | | | | | | | | | Module*. Also, dropped uses of TargetMachine where unnecessary. The only target which still takes a TargetMachine& is Mips, I would appreciate it if someone would normalize this to match other targets. llvm-svn: 77918
* Remove unneeded intrinsics from Blackfin backend.Jakob Stoklund Olesen2009-08-021-7/+1
| | | | | | | | | | __builtin_bfin_ones does the same as ctpop, so it can be implemented in the front-end. __builtin_bfin_loadbytes loads from an unaligned pointer with the disalignexcpt instruction. It does the same as loading from a pointer with the low bits masked. It is better if the front-end creates a masked load. We can always instruction select the masked to disalignexcpt+load. We keep csync/ssync/idle. These intrinsics represent instructions that need workarounds for some silicon revisions. We may even want to convert inline assembler to intrinsics to enable the workarounds. llvm-svn: 77917
* Add some basic blackfin intrinsics.Jakob Stoklund Olesen2009-08-021-1/+42
| | | | llvm-svn: 77903
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