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* SPARC backend: Modified LowerCall and LowerFormalArguments so that they use ↵Venkatraman Govindaraju2011-01-182-272/+221
| | | | | | CallingConv assignments. llvm-svn: 123749
* McARM: Use accessors where appropriate.Daniel Dunbar2011-01-181-13/+13
| | | | llvm-svn: 123746
* McARM: Fill in ASMOperand::dump() for memory operands.Daniel Dunbar2011-01-181-1/+56
| | | | llvm-svn: 123745
* McARM: Make ARMOperand use a union where appropriate.Daniel Dunbar2011-01-181-9/+13
| | | | llvm-svn: 123744
* McARM: Unify ParseMemory() successfull return.Daniel Dunbar2011-01-181-40/+22
| | | | llvm-svn: 123740
* McARM: Early exit on failure (NEFC).Daniel Dunbar2011-01-181-7/+8
| | | | llvm-svn: 123739
* McARM: Always keep an offset expression, if used (instead of assuming == 0 ↵Daniel Dunbar2011-01-181-24/+29
| | | | | | | | if used but not present), and simplify logic. Also, clean up various non-sensicalisms in isMemModeRegThumb() and isMemModeImmThumb(). llvm-svn: 123738
* McARM: Add a variety of asserts on the sanity of memory operands.Daniel Dunbar2011-01-181-1/+10
| | | | llvm-svn: 123737
* McARM: Use a consistent marker for not-set OffsetRegNum.Daniel Dunbar2011-01-181-1/+1
| | | | llvm-svn: 123736
* McARM: Start marking T2 address operands as such, for the benefit of the parser.Daniel Dunbar2011-01-181-0/+5
| | | | llvm-svn: 123722
* The stub routine that we're calling uses test and so clobbersEric Christopher2011-01-181-2/+2
| | | | | | the flags. llvm-svn: 123712
* minor change to rafael's recent patches: if something isChris Lattner2011-01-181-1/+7
| | | | | | | constant but requires a unique address, we can still put it in a readonly section, just not a mergable one. llvm-svn: 123711
* Remove unused variables found by gcc-4.6's -Wunused-but-set-variable.Jeffrey Yasskin2011-01-184-16/+0
| | | | llvm-svn: 123707
* Add a missing <cctype> include, from Joerg Sonnenberger!Douglas Gregor2011-01-171-0/+1
| | | | llvm-svn: 123670
* Split up RotateShift itinerary in SPU.Kalle Raiskila2011-01-172-38/+40
| | | | | | | | 'rotq*' and 'shlq*' instructions go to the odd pipeline, wheras the inter-vector equivalents 'rot*', 'shl*' go to the even. llvm-svn: 123622
* Don't crash SPU BE with memory accesses with big alignmnet.Kalle Raiskila2011-01-171-4/+4
| | | | llvm-svn: 123620
* Materialize GA addresses with movw + movt pairs for Darwin in PIC mode. e.g.Evan Cheng2011-01-1715-81/+244
| | | | | | | | | | | | movw r0, :lower16:(L_foo$non_lazy_ptr-(LPC0_0+4)) movt r0, :upper16:(L_foo$non_lazy_ptr-(LPC0_0+4)) LPC0_0: add r0, pc, r0 It's not yet enabled by default as some tests are failing. I suspect bugs in down stream tools. llvm-svn: 123619
* Provide instruction sizes for ARMv5 variants of MUL instructions.Anton Korobeynikov2011-01-161-29/+30
| | | | | | This fixes PR8987 llvm-svn: 123598
* Update README.txt to remove the DAE enhancement.Anders Carlsson2011-01-161-23/+0
| | | | llvm-svn: 123597
* Only put unnamed_addr constants in mergeable sections. Fixes PR8297.Rafael Espindola2011-01-161-1/+1
| | | | llvm-svn: 123585
* fix PR8514, a bug where the "heroic" transformation of shift/and Chris Lattner2011-01-161-13/+9
| | | | | | | | into and/shift would cause nodes to move around and a dangling pointer to happen. The code tried to avoid this with a HandleSDNode, but got the details wrong. llvm-svn: 123578
* add some commentaryChris Lattner2011-01-161-1/+14
| | | | llvm-svn: 123572
* Spill R4 if it's going to be used to restore SP from FP.Evan Cheng2011-01-161-4/+12
| | | | llvm-svn: 123567
* Implement AnalyzeBranch in Sparc Backend.Venkatraman Govindaraju2011-01-162-7/+199
| | | | llvm-svn: 123561
* fix PR8981, a crash trying to form a conditional inc with a floating point ↵Chris Lattner2011-01-161-1/+2
| | | | | | compare. llvm-svn: 123560
* reapply my fix for PR8961 with a tweak to properly handleChris Lattner2011-01-161-1/+1
| | | | | | | multi-instruction sequences like calls. Many thanks to Jakob for finding a testcase. llvm-svn: 123559
* Simplify a README.txt entry significantly to expose the core issue.Chandler Carruth2011-01-161-28/+26
| | | | llvm-svn: 123556
* 80-col.Eric Christopher2011-01-151-2/+4
| | | | llvm-svn: 123505
* Fix a comment.Bob Wilson2011-01-151-2/+2
| | | | llvm-svn: 123497
* Fix 80-cols.Eric Christopher2011-01-141-7/+14
| | | | llvm-svn: 123494
* 'HiReg' is written but never read. Nuke itsTed Kremenek2011-01-141-5/+5
| | | | | | | | declaration and its assignments. Found by clang static analyzer. llvm-svn: 123486
* Add a possibility to switch between CFI directives- and table-based frame ↵Anton Korobeynikov2011-01-142-5/+5
| | | | | | description emission. Currently all the backends use table-based stuff. llvm-svn: 123476
* CleanupAnton Korobeynikov2011-01-141-6/+1
| | | | llvm-svn: 123475
* revert my fastisel patch again which apparently still gives theChris Lattner2011-01-141-1/+1
| | | | | | llvm-gcc-i386-linux-selfhost buildbot heartburn... llvm-svn: 123431
* reapply r123414 now that the botz are calmed down and the fix is already in.Chris Lattner2011-01-141-1/+1
| | | | llvm-svn: 123427
* Completed :lower16: / :upper16: support for movw / movt pairs on Darwin.Evan Cheng2011-01-143-28/+72
| | | | | | | | - Fixed :upper16: fix up routine. It should be shifting down the top 16 bits first. - Added support for Thumb2 :lower16: and :upper16: fix up. - Added :upper16: and :lower16: relocation support to mach-o object writer. llvm-svn: 123424
* r123414 broke llvm-gcc bootstrap apparently, revertChris Lattner2011-01-141-1/+1
| | | | llvm-svn: 123422
* fix PR8961 - a fast isel miscompilation where we'd insert a new instructionChris Lattner2011-01-141-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | after sext's generated for addressing that got folded. Previously we compiled test5 into: _test5: ## @test5 ## BB#0: movq -8(%rsp), %rax ## 8-byte Reload movq (%rdi,%rax), %rdi addq %rdx, %rdi movslq %esi, %rax movq %rax, -8(%rsp) ## 8-byte Spill movq %rdi, %rax ret which is insane and wrong. Now we produce: _test5: ## @test5 ## BB#0: movslq %esi, %rax movq (%rdi,%rax), %rax addq %rdx, %rax ret llvm-svn: 123414
* Recognize alternative register names like ip -> r12.Owen Anderson2011-01-131-3/+14
| | | | | | Fixes <rdar://problem/8857982>. llvm-svn: 123409
* Fix a few more places that should use MBB::getLastNonDebugInstr().Jakob Stoklund Olesen2011-01-133-3/+3
| | | | llvm-svn: 123408
* typoChris Lattner2011-01-131-1/+1
| | | | llvm-svn: 123406
* memcpy + metadata = bliss :)Chris Lattner2011-01-131-0/+48
| | | | llvm-svn: 123405
* Add support to the ARM MC infrastructure to support mcr and friends. This ↵Owen Anderson2011-01-134-29/+225
| | | | | | | | | | | | | | requires supporting the symbolic immediate names used for these instructions, fixing their pretty-printers, and adding proper encoding information for them. With this, we can properly pretty-print and encode assembly like: mrc p15, #0, r3, c13, c0, #3 Fixes <rdar://problem/8857858>. llvm-svn: 123404
* Teach frame lowering to ignore debug values after the terminators.Jakob Stoklund Olesen2011-01-1312-24/+26
| | | | llvm-svn: 123399
* Tidy comments, indentation, and 80-column violations.Bob Wilson2011-01-131-37/+39
| | | | llvm-svn: 123397
* Fix ARMAsmParser::ParseOperand() to allow it to parse . as a branch target andKevin Enderby2011-01-131-2/+4
| | | | | | directional local labels like 1f and 2b. llvm-svn: 123393
* When updating a tSpill/tRestore instruction to be a tSTRr/tLDRr, correctlyJim Grosbach2011-01-131-4/+7
| | | | | | | | | set up the source operands. The original instr has an immediate operand that should be replaced with the frame reg operand rather than just adding the reg operand. Previously, the instruction ended up with too many operands causing an assert() when adding the default predicate. rdar://8825456 llvm-svn: 123387
* Model :upper16: and :lower16: as ARM specific MCTargetExpr. This is a stepEvan Cheng2011-01-139-75/+219
| | | | | | | | in the right direction. It eliminated some hacks and will unblock codegen work. But it's far from being done. It doesn't reject illegal expressions, e.g. (FOO - :lower16:BAR). It also doesn't work in Thumb2 mode at all. llvm-svn: 123369
* Experiment with changing the default 32-bit linux stack alignment toEric Christopher2011-01-131-3/+3
| | | | | | 16 bytes for PR8969. Update all testcases accordingly. llvm-svn: 123367
* Add a FIXME and two asserts for now in the ARMAsmParser when it sees .code 16 orKevin Enderby2011-01-131-2/+12
| | | | | | | | .code 32 if the TargetMachine's isThumb() boolean does not match. The correct fix is to switch ARM subtargets at that point and is tracked by rdar://8856789 which is bigger task. llvm-svn: 123353
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