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* Enable exception handling int JITNicolas Geoffray2008-02-132-5/+23
| | | | llvm-svn: 47079
* Fix the PPC JIT regressions by encoding zeroreg as 0 for BLR.Chris Lattner2008-02-131-0/+1
| | | | llvm-svn: 47067
* don't try to avoid inserting loads when lowering FORMAL_ARGUMENTS. Chris Lattner2008-02-133-39/+17
| | | | | | DAGCombine is now quite good at zapifying them. llvm-svn: 47053
* readme updatesNate Begeman2008-02-132-0/+20
| | | | llvm-svn: 47051
* Make register scavenging happy by not using a reg (CR0) that isn't definedNate Begeman2008-02-131-1/+1
| | | | llvm-svn: 47045
* commuteInstr() can now commute non-ssa machine instrs.Evan Cheng2008-02-132-0/+19
| | | | llvm-svn: 47043
* Convert SelectionDAG::ComputeMaskedBits to use APInt instead of uint64_t.Dan Gohman2008-02-139-40/+38
| | | | | | | Add an overload that supports the uint64_t interface for use by clients that haven't been updated yet. llvm-svn: 47039
* __DATA not __DATA__ is the right segment name on darwin.Dale Johannesen2008-02-122-2/+2
| | | | | | Spotted by Nick Kledzik. llvm-svn: 47037
* Remove some dead codeNate Begeman2008-02-121-7/+3
| | | | llvm-svn: 47036
* SSE4.1 64b integer insert/extract pattern supportNate Begeman2008-02-124-41/+73
| | | | | | Move formats into the formats file llvm-svn: 47035
* Revert r46916 PPCTargetAsmInfo.cpp.Evan Cheng2008-02-121-2/+2
| | | | llvm-svn: 47020
* Only using x86-64 rip relative addressing in non-staic mode?Evan Cheng2008-02-121-4/+8
| | | | llvm-svn: 47019
* Update comment.Evan Cheng2008-02-121-2/+2
| | | | llvm-svn: 47002
* Unbreak various insert_vector_elt and extract_vector_elt tests in presence ↵Evan Cheng2008-02-121-4/+4
| | | | | | of SSE4. llvm-svn: 47001
* Stuff noticed while grepping codeNate Begeman2008-02-111-65/+7
| | | | llvm-svn: 46979
* Enable SSE4 codegen and pattern matching.Nate Begeman2008-02-115-25/+242
| | | | | | Add some notes to the README. llvm-svn: 46949
* additional missing featureNate Begeman2008-02-111-0/+1
| | | | llvm-svn: 46948
* xmm0 variable blendsNate Begeman2008-02-101-2/+27
| | | | llvm-svn: 46931
* Rename MRegisterInfo to TargetRegisterInfo.Dan Gohman2008-02-1054-104/+114
| | | | llvm-svn: 46930
* Match GCC's behaviour for these sections.Nick Lewycky2008-02-101-2/+2
| | | | llvm-svn: 46916
* memopv16i8 had wrong alignment requirement, would have broken pabsbNate Begeman2008-02-091-129/+193
| | | | | | | | pabs{b,w,d} are not two address fix extract-to-mem sse4 ops add sse4 vector sign extend nodes llvm-svn: 46915
* Skeleton of insert and extract matching, more to comeNate Begeman2008-02-091-2/+62
| | | | llvm-svn: 46902
* Tablegen support for insert & extract element matchingNate Begeman2008-02-091-0/+16
| | | | llvm-svn: 46901
* It's not always safe to fold movsd into xorpd, etc. Check the alignment of ↵Evan Cheng2008-02-0814-33/+101
| | | | | | the load address first to make sure it's 16 byte aligned. llvm-svn: 46893
* 64-bit (MMX) vectors do not need restrictive alignment.Dale Johannesen2008-02-081-6/+4
| | | | | | 128-bit vectors need it only when SSE is on. llvm-svn: 46890
* Avoid needlessly casting away const qualifiers.Dan Gohman2008-02-084-8/+8
| | | | llvm-svn: 46877
* Added missing entries in X86 load / store folding tables.Evan Cheng2008-02-081-0/+8
| | | | llvm-svn: 46866
* Follow Chris' suggestion; change the PseudoSourceValue accessorsDan Gohman2008-02-072-15/+15
| | | | | | | to return pointers instead of references, since this is always what is needed. llvm-svn: 46857
* Add SourceValue information for outgoing argument stores on x86.Dan Gohman2008-02-071-2/+4
| | | | llvm-svn: 46854
* Fix a x86-64 codegen deficiency. Allow gv + offset when using rip addressing ↵Evan Cheng2008-02-075-49/+30
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | mode. Before: _main: subq $8, %rsp leaq _X(%rip), %rax movsd 8(%rax), %xmm1 movss _X(%rip), %xmm0 call _t xorl %ecx, %ecx movl %ecx, %eax addq $8, %rsp ret Now: _main: subq $8, %rsp movsd _X+8(%rip), %xmm1 movss _X(%rip), %xmm0 call _t xorl %ecx, %ecx movl %ecx, %eax addq $8, %rsp ret Notice there is another idiotic codegen issue that needs to be fixed asap: xorl %ecx, %ecx movl %ecx, %eax llvm-svn: 46850
* In some cases, e.g. ADD32ri, no transformation is made. Guide against it.Evan Cheng2008-02-071-0/+2
| | | | llvm-svn: 46849
* Re-apply the memory operand changes, with a fix for the staticDan Gohman2008-02-066-94/+102
| | | | | | | | initializer problem, a minor tweak to the way the DAGISelEmitter finds load/store nodes, and a renaming of the new PseudoSourceValue objects. llvm-svn: 46827
* Move to getCALLSEQ_END to ensure CALLSEQ_END node produces a flag. This is ↵Evan Cheng2008-02-051-2/+7
| | | | | | consistent with the definition in td file. llvm-svn: 46775
* Implement sseregparm.Dale Johannesen2008-02-052-4/+18
| | | | llvm-svn: 46764
* Ident mnemonics appropriatelyNate Begeman2008-02-051-4/+4
| | | | llvm-svn: 46746
* Dwarf requires variable entries to be in the source order. Right now, since ↵Evan Cheng2008-02-048-8/+0
| | | | | | we are recording variable information at isel time this means parameters would appear in the reverse order. The short term fix is to issue recordVariable() at asm printing time instead. llvm-svn: 46724
* This method should be virtualNate Begeman2008-02-041-1/+1
| | | | llvm-svn: 46723
* Eliminate some redundant code.Nate Begeman2008-02-041-7/+1
| | | | llvm-svn: 46720
* The rest of the SSE4.1 intrinsic patterns that are obvious to me. GettingNate Begeman2008-02-041-8/+45
| | | | | | Evan's help with the rest. llvm-svn: 46697
* Some more SSE 4.1 intrinsic patterns.Nate Begeman2008-02-041-31/+94
| | | | llvm-svn: 46696
* SSE 4.1 Intrinsics and detectionNate Begeman2008-02-036-1/+119
| | | | llvm-svn: 46681
* explicitly include Compiler.h instead of getting it from tblgen in the ↵Chris Lattner2008-02-034-0/+4
| | | | | | middle of a class. llvm-svn: 46676
* don't do ReplaceUses on a result that doesn't exist.Chris Lattner2008-02-031-2/+4
| | | | llvm-svn: 46673
* Get rid of the annoying blank lines before labels.Evan Cheng2008-02-029-11/+1
| | | | llvm-svn: 46667
* Don't use uninitialized values. Fixes vec_align.ll on X86 Linux.Nick Lewycky2008-02-021-1/+1
| | | | llvm-svn: 46666
* Unbreak ppc debug support.Evan Cheng2008-02-021-0/+3
| | | | llvm-svn: 46665
* SDIsel processes llvm.dbg.declare by recording the variable debug ↵Evan Cheng2008-02-0210-2/+21
| | | | | | | | | information descriptor and its corresponding stack frame index in MachineModuleInfo. This only works if the local variable is "homed" in the stack frame. It does not work for byval parameter, etc. Added ISD::DECLARE node type to represent llvm.dbg.declare intrinsic. Now the intrinsic calls are lowered into a SDNode and lives on through out the codegen passes. For now, since all the debugging information recording is done at isel time, when a ISD::DECLARE node is selected, it has the side effect of also recording the variable. This is a short term solution that should be fixed in time. llvm-svn: 46659
* Frame index can be negative.Evan Cheng2008-02-023-3/+3
| | | | llvm-svn: 46655
* CBackend: Implement unaligned load/store.Lauro Ramos Venancio2008-02-011-14/+35
| | | | llvm-svn: 46646
* Remove the nasty LABEL hack with a much less evil one. Now ↵Evan Cheng2008-02-012-20/+0
| | | | | | llvm.dbg.func.start implies a stoppoint is set. SelectionDAGISel records a new source line but does not create a ISD::LABEL node for this special stoppoint. Asm printer will magically print this label. This ensures nothing is emitted before. llvm-svn: 46635
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