| Commit message (Collapse) | Author | Age | Files | Lines | |
|---|---|---|---|---|---|
| * | Add x86 fast-isel for calls returning first-class aggregates. rdar://9435872. | Eli Friedman | 2011-05-17 | 1 | -48/+43 |
| | | | | | llvm-svn: 131438 | ||||
| * | Kill some dead code. | Jim Grosbach | 2011-05-16 | 1 | -3/+1 |
| | | | | | llvm-svn: 131431 | ||||
| * | Remove dead code. Fix associated test to use FileCheck. | Eli Friedman | 2011-05-16 | 1 | -14/+0 |
| | | | | | llvm-svn: 131424 | ||||
| * | Make fast-isel work correctly s/uadd.with.overflow intrinsics. | Eli Friedman | 2011-05-16 | 1 | -76/+7 |
| | | | | | llvm-svn: 131420 | ||||
| * | sets bit 0 of the function address of thumb function in .symtab | Rafael Espindola | 2011-05-16 | 2 | -6/+21 |
| | | | | | | | | | | | ("T is 1 if the target symbol S has type STT_FUNC and the symbol addresses a Thumb instruction ;it is 0 otherwise." from "ELF for the ARM Architecture" 4.7.1.2) Patch by Koan-Sin Tan! llvm-svn: 131406 | ||||
| * | Fix a FIXME by moving the fast-isel implementation of the objectsize ↵ | Eli Friedman | 2011-05-14 | 1 | -23/+0 |
| | | | | | | | intrinsic from the x86 code to the generic code. llvm-svn: 131332 | ||||
| * | Don't produce a vmovntdq if we don't have AVX support. | Rafael Espindola | 2011-05-14 | 1 | -1/+1 |
| | | | | | llvm-svn: 131330 | ||||
| * | Zap useless code; this hasn't done anything useful since fast-isel switched ↵ | Eli Friedman | 2011-05-14 | 1 | -29/+0 |
| | | | | | | | to being bottom-up (a very long time ago). llvm-svn: 131329 | ||||
| * | Fix a source of non determinism in FindUsedTypes, use a SetVector instead of a | Julien Lerouge | 2011-05-13 | 1 | -5/+4 |
| | | | | | | | | | set. rdar://9423996 llvm-svn: 131283 | ||||
| * | Fix setting of isCommutable flag. | Akira Hatanaka | 2011-05-12 | 2 | -16/+25 |
| | | | | | llvm-svn: 131233 | ||||
| * | Turn this into a table, this will make more sense shortly. | Eric Christopher | 2011-05-11 | 1 | -11/+29 |
| | | | | | | | Part of rdar://8470697 llvm-svn: 131200 | ||||
| * | Fix encoding of Thumb BLX register instructions. Patch by Koan-Sin Tan. | Owen Anderson | 2011-05-11 | 1 | -4/+8 |
| | | | | | llvm-svn: 131189 | ||||
| * | Add custom lowering of X86 vector SRA/SRL/SHL when the shift amount is a ↵ | Nadav Rotem | 2011-05-11 | 2 | -11/+80 |
| | | | | | | | splat vector. llvm-svn: 131179 | ||||
| * | Give the 'eh.sjlj.dispatchsetup' intrinsic call the value coming from the setjmp | Bill Wendling | 2011-05-11 | 2 | -4/+4 |
| | | | | | | | | | intrinsic call. This prevents it from being reordered so that it appears *before* the setjmp intrinsic (thus making it completely useless). <rdar://problem/9409683> llvm-svn: 131174 | ||||
| * | Optimize atomic lock or that doesn't use the result value. | Eric Christopher | 2011-05-10 | 2 | -1/+83 |
| | | | | | | | | | Next up: xor and and. Part of rdar://8470697 llvm-svn: 131171 | ||||
| * | Refactor lock versions of binary operators to be a little less | Eric Christopher | 2011-05-10 | 1 | -73/+83 |
| | | | | | | | cut and paste. llvm-svn: 131139 | ||||
| * | First cut at getting debugging support for ARM/MC/ELF/.o | Jason W Kim | 2011-05-10 | 1 | -1/+0 |
| | | | | | | | | DWARF stuff also gets fixed up by ELFARMAsmBackend::ApplyFixup(), but the offset is not guaranteed to be mod 4 == 0 as in text/data. llvm-svn: 131137 | ||||
| * | PTX: add PTX 2.3 setting in PTX sub-target. | Justin Holewinski | 2011-05-10 | 2 | -0/+4 |
| | | | | | | | Patch by Wei-Ren Chen llvm-svn: 131123 | ||||
| * | Fix td file comments for Mips. | Eric Christopher | 2011-05-09 | 3 | -3/+7 |
| | | | | | | | Patch by Liu <proljc@gmail.com>! llvm-svn: 131086 | ||||
| * | Fixed MC encoding for index_align for VLD1/VST1 (single element from one ↵ | Mon P Wang | 2011-05-09 | 4 | -2/+60 |
| | | | | | | | lane) for size 32 llvm-svn: 131085 | ||||
| * | X86: Add a bunch of peeps for add and sub of SETB. | Benjamin Kramer | 2011-05-08 | 1 | -0/+24 |
| | | | | | | | | | | | | | | | | | "b + ((a < b) ? 1 : 0)" compiles into cmpl %esi, %edi adcl $0, %esi instead of cmpl %esi, %edi sbbl %eax, %eax andl $1, %eax addl %esi, %eax This saves a register, a false dependency on %eax (Intel's CPUs still don't ignore it) and it's shorter. llvm-svn: 131070 | ||||
| * | Eliminate the ARM sub-register indexes that are not needed by the sources. | Jakob Stoklund Olesen | 2011-05-07 | 1 | -33/+6 |
| | | | | | | | | Tablegen will invent its own names for these indexes, and the register file is a bit simpler. llvm-svn: 131059 | ||||
| * | Fix the non-MC encoding of pkhbt and pkhtb. | Eric Christopher | 2011-05-07 | 1 | -0/+6 |
| | | | | | | | Patch by Stephen Hines. llvm-svn: 131045 | ||||
| * | 1. Keep lines in 80 columns. | Akira Hatanaka | 2011-05-06 | 2 | -6/+6 |
| | | | | | | | | 2. Remove unused function. 3. Correct indentation. llvm-svn: 131028 | ||||
| * | Make the logic for determining function alignment more explicit. No ↵ | Eli Friedman | 2011-05-06 | 26 | -97/+30 |
| | | | | | | | functionality change. llvm-svn: 131012 | ||||
| * | Dead code elimination. | Rafael Espindola | 2011-05-06 | 2 | -4/+0 |
| | | | | | llvm-svn: 130984 | ||||
| * | PTX: add PTX 2.3 language target | Justin Holewinski | 2011-05-06 | 3 | -1/+7 |
| | | | | | | | Patch by Wei-Ren Chen llvm-svn: 130980 | ||||
| * | Move PPC Linux to CFI. | Rafael Espindola | 2011-05-05 | 1 | -1/+1 |
| | | | | | llvm-svn: 130951 | ||||
| * | PR9848: pandn is not commutative. | Eli Friedman | 2011-05-05 | 1 | -1/+1 |
| | | | | | | | No test because I can't think of any way to write one that won't break quickly. llvm-svn: 130932 | ||||
| * | Remove a flag that would set the ".eh" symbol as .globl. MachO was the only one | Bill Wendling | 2011-05-05 | 1 | -1/+0 |
| | | | | | | | | | who used this flag, and it now emits CFI and doesn't emit this anymore. All other targets left this flag "false". <rdar://problem/8486371> llvm-svn: 130918 | ||||
| * | Fix X86RegisterInfo::getMatchingSuperRegClass for sub_8bit_hi. | Jakob Stoklund Olesen | 2011-05-04 | 1 | -13/+8 |
| | | | | | | | | It is OK for B to be any GR8_ABCD_H superclass, the returned register class doesn't have to map surjectively onto B. llvm-svn: 130892 | ||||
| * | Implement SystemZRegisterInfo::getMatchingSuperRegClass to enable ↵ | Jakob Stoklund Olesen | 2011-05-04 | 2 | -0/+18 |
| | | | | | | | cross-class joins. llvm-svn: 130857 | ||||
| * | Do not emit location expression size twice. | Devang Patel | 2011-05-04 | 1 | -12/+0 |
| | | | | | llvm-svn: 130854 | ||||
| * | Fix cmake build. | Rafael Espindola | 2011-05-04 | 1 | -0/+1 |
| | | | | | llvm-svn: 130850 | ||||
| * | Prevent instructions using $gp from being placed between a jalr and the ↵ | Akira Hatanaka | 2011-05-04 | 5 | -11/+89 |
| | | | | | | | instruction that restores the clobbered $gp. llvm-svn: 130847 | ||||
| * | Implement MSP430RegisterInfo::getMatchingSuperRegClass to enable cross-class | Jakob Stoklund Olesen | 2011-05-04 | 1 | -0/+7 |
| | | | | | | | coalescing. llvm-svn: 130814 | ||||
| * | Mark ultra-super-registers QQQQ as call-clobbered instead of the D ↵ | Jakob Stoklund Olesen | 2011-05-03 | 3 | -32/+11 |
| | | | | | | | | | | | | | | | | sub-registers. LiveVariables doesn't understand that clobbering D0 and D1 completely overwrites Q0, so if Q0 is live-in to a function, its live range will extend beyond a function call that only clobbers D0 and D1. This shows up in the ARM/2009-11-01-NeonMoves test case. LiveVariables should probably implement the much stricter rules for physreg liveness that RAFast imposes - a physreg is killed by the first use of any alias. llvm-svn: 130801 | ||||
| * | Replace the "movnt" intrinsics with a native store + nontemporal metadata bit. | Bill Wendling | 2011-05-03 | 1 | -38/+12 |
| | | | | | | | <rdar://problem/8460511> llvm-svn: 130791 | ||||
| * | Fix function MipsRegisterInfo::getRegisterNumbering. | Akira Hatanaka | 2011-05-03 | 1 | -10/+10 |
| | | | | | llvm-svn: 130774 | ||||
| * | Temporarily disable use of divmod compiler-rt functions for iOS. | Bob Wilson | 2011-05-03 | 1 | -6/+0 |
| | | | | | llvm-svn: 130766 | ||||
| * | Fold ARM coprocessor intrinsics patterns into the instructions defs whenever | Bruno Cardoso Lopes | 2011-05-03 | 3 | -96/+73 |
| | | | | | | | it's possible. llvm-svn: 130764 | ||||
| * | Add a few ARM coprocessor intrinsics. Testcases included | Bruno Cardoso Lopes | 2011-05-03 | 4 | -0/+71 |
| | | | | | llvm-svn: 130763 | ||||
| * | Remove unused variables caught by GCC's -Wunused-but-set-variable. | Benjamin Kramer | 2011-05-03 | 1 | -2/+0 |
| | | | | | llvm-svn: 130755 | ||||
| * | Add pentium{3,4}m cpus. Patch by Alexander Best! | Michael J. Spencer | 2011-05-03 | 1 | -0/+2 |
| | | | | | llvm-svn: 130749 | ||||
| * | xmm0 is an implicit parameter in this and so shouldn't be in the | Eric Christopher | 2011-05-03 | 1 | -2/+2 |
| | | | | | | | | | string template. Fixes rdar://8493866 llvm-svn: 130747 | ||||
| * | Add an unfolded offset field to LSR's Formula record. This is used to | Dan Gohman | 2011-05-03 | 2 | -0/+14 |
| | | | | | | | | | model constants which can be added to base registers via add-immediate instructions which don't require an additional register to materialize the immediate. llvm-svn: 130743 | ||||
| * | Apparently the check for direct calls is unnecessary. | Eric Christopher | 2011-05-02 | 1 | -2/+2 |
| | | | | | llvm-svn: 130716 | ||||
| * | Add 130690 back. | Rafael Espindola | 2011-05-02 | 1 | -1/+1 |
| | | | | | llvm-svn: 130693 | ||||
| * | Revert while I debug the tests that use march but not mtriple. | Rafael Espindola | 2011-05-02 | 1 | -1/+1 |
| | | | | | llvm-svn: 130691 | ||||
| * | Move ppc OS X to cfi too. I am building it on an old ppc mini, but it will ↵ | Rafael Espindola | 2011-05-02 | 1 | -1/+1 |
| | | | | | | | take some time. llvm-svn: 130690 | ||||

