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* Properly handle passing of FP stuff to varargs function on Win64:Anton Korobeynikov2010-08-272-0/+42
| | | | | | | value should be copied to the corresponding shadow reg as well. Patch by Cameron Esfahani! llvm-svn: 112262
* X86: Fix an encoding issue with LOCK_ADD64mr, which could lead to very hard ↵Daniel Dunbar2010-08-271-1/+1
| | | | | | to find miscompiles with the integrated assembler. llvm-svn: 112250
* Simplify eliminateFrameIndex() interface back down now that PEI doesn't needJim Grosbach2010-08-2628-128/+71
| | | | | | to try to re-use scavenged frame index reference registers. rdar://8277890 llvm-svn: 112241
* tidy up a bit. no functional change.Jim Grosbach2010-08-262-31/+10
| | | | llvm-svn: 112228
* Turn off the scavenging based frame reg reuse briefly to measure whether it'sJim Grosbach2010-08-261-1/+1
| | | | | | | | still having a significant effect. It shouldn't be now that the pre-RA virtual base reg stuff is in. Assuming that's valididated by the nightly testers, we can simplify a lot of the PEI frame index code. llvm-svn: 112220
* zap the now unused MVT::getIntVectorWithNumElementsBruno Cardoso Lopes2010-08-261-1/+1
| | | | llvm-svn: 112218
* Use pseudo instructions for VST3.Bob Wilson2010-08-264-59/+81
| | | | llvm-svn: 112208
* Reapply r112176 without removing the other CMN patterns (that was ↵Bill Wendling2010-08-261-2/+46
| | | | | | unintentional). llvm-svn: 112206
* Fix comment typos.Bob Wilson2010-08-263-3/+3
| | | | llvm-svn: 112202
* Restrict the register to tGPR to make sure the str instruction will beJim Grosbach2010-08-261-4/+4
| | | | | | encodable as a 16-bit wide instruction. llvm-svn: 112195
* Revert r112176; it broke test/CodeGen/Thumb2/thumb2-cmn.ll.Dan Gohman2010-08-261-50/+8
| | | | llvm-svn: 112191
* Reapply r112091 and r111922, support for metadata linking, with aDan Gohman2010-08-261-1/+1
| | | | | | | | | | | | | | fix: add a flag to MapValue and friends which indicates whether any module-level mappings are being made. In the common case of inlining, no module-level mappings are needed, so MapValue doesn't need to examine non-function-local metadata, which can be very expensive in the case of a large module with really deep metadata (e.g. a large C++ program compiled with -g). This flag is a little awkward; perhaps eventually it can be moved into the ClonedCodeInfo class. llvm-svn: 112190
* There seems to be a (potential) hardware bug with the CMN instruction andBill Wendling2010-08-261-8/+50
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | comparison with 0. These two pieces of code should give identical results: rsbs r1, r1, 0 cmp r0, r1 mov r0, #0 it ls mov r0, #1 and: cmn r0, r1 mov r0, #0 it ls mov r0, #1 However, the CMN gives the *opposite* result when r1 is 0. This is because the carry flag is set in the CMP case but not in the CMN case. In short, the CMP instruction doesn't perform a truncate of the (logical) NOT of 0 plus the value of r0 and the carry bit (because the "carry bit" parameter to AddWithCarry is defined as 1 in this case, the carry flag will always be set when r0 >= 0). The CMN instruction doesn't perform a NOT of 0 so there is never a "carry" when this AddWithCarry is performed (because the "carry bit" parameter to AddWithCarry is defined as 0). The AddWithCarry in the CMP case seems to be relying upon the identity: ~x + 1 = -x However when x is 0 and unsigned, this doesn't hold: x = 0 ~x = 0xFFFF FFFF ~x + 1 = 0x1 0000 0000 (-x = 0) != (0x1 0000 0000 = ~x + 1) Therefore, we should disable *all* versions of CMN, especially when comparing against zero, until we can limit when the CMN instruction is used (when we know that the RHS is not 0) or when we have a hardware fix for this. (See the ARM docs for the "AddWithCarry" pseudo-code.) This is related to <rdar://problem/7569620>. llvm-svn: 112176
* implement SplitVecOp_CONCAT_VECTORS, fixing the included testcase with SSE1.Chris Lattner2010-08-261-2/+1
| | | | llvm-svn: 112171
* Use pseudo instructions for VST1d64Q.Bob Wilson2010-08-264-4/+9
| | | | llvm-svn: 112170
* fix sse1 only codegen in x86-64 mode, which is something weChris Lattner2010-08-261-6/+11
| | | | | | apparently try to support. llvm-svn: 112168
* remove dead protoChris Lattner2010-08-261-1/+0
| | | | llvm-svn: 112131
* Fix PR7748 without using microsoft extensionsBruno Cardoso Lopes2010-08-262-13/+13
| | | | llvm-svn: 112128
* Enable pre-RA virtual frame base register allocation. rdar://8277890Jim Grosbach2010-08-261-1/+1
| | | | llvm-svn: 112127
* Revert svn 107892 (with changes to work with trunk). It caused a crash ifBob Wilson2010-08-261-1/+28
| | | | | | | a VLD result was not used (Radar 8355607). It should also fix pr7988, but I haven't verified that yet. llvm-svn: 112118
* we should pattern match the SSE complex arithmetic ops.Chris Lattner2010-08-251-0/+26
| | | | llvm-svn: 112109
* Start converting NEON load/stores to use pseudo instructions, beginning hereBob Wilson2010-08-255-41/+165
| | | | | | | | | | | with the VST4 instructions. Until after register allocation, we want to represent sets of adjacent registers by a single super-register. These VST4 pseudo instructions have a single QQ or QQQQ source register operand. They get expanded to the real VST4 instructions with 4 separate D register operands. Once this conversion is complete, we'll be able to remove the NEONPreAllocPass and avoid some fragile and hacky code elsewhere. llvm-svn: 112108
* Revert this for now, PUNPCKLDQ dont operate on v4f32Bruno Cardoso Lopes2010-08-251-1/+1
| | | | llvm-svn: 112090
* X86: Fix misencode of RI64mi8. This fixes OpenSSL / x86_64-apple-darwin10 / ↵Daniel Dunbar2010-08-251-4/+3
| | | | | | clang -O3. llvm-svn: 112089
* Don't override the var from the enclosing scope.Jim Grosbach2010-08-251-2/+2
| | | | | | | When doing copy/paste/modify, it's apparently rather important to remember the 'modify' bit... llvm-svn: 112075
* zap dead codeChris Lattner2010-08-251-34/+0
| | | | llvm-svn: 112073
* Remove dead recursive function. Yay for clang -Wunused-function.Benjamin Kramer2010-08-251-7/+0
| | | | llvm-svn: 112060
* ARM/Thumb2: Fix a misselect in getARMCmp, when attempting to adjust a signedDaniel Dunbar2010-08-251-4/+4
| | | | | | | | | comparison that would overflow. - The other under/overflow cases can't actually happen because the immediates which would trigger them are legal (so we don't enter this code), but adjusted the style to make it clear the transform is always valid. llvm-svn: 112053
* Do type checks before we bother to do everything else.Eric Christopher2010-08-251-8/+9
| | | | llvm-svn: 112039
* Fix nasty mingw32 bug, which e.g. prevented llvm-gcc bootstrap there.Anton Korobeynikov2010-08-253-6/+10
| | | | | | | | Mark _alloca call as clobberring EFLAGS, otherwise some DCE might remove other flags-clobberring stuff (e.g. cmp instructions) occuring after _alloca call. llvm-svn: 112034
* Reorganize load mechanisms. Handle types in a little less fixed way.Eric Christopher2010-08-251-19/+45
| | | | | | Fix some todos. No functional change. llvm-svn: 112031
* PUNPCKLDQ should also be used for v4f32Bruno Cardoso Lopes2010-08-251-1/+1
| | | | llvm-svn: 112020
* teach lowering to get target specific nodes for pshufd, emulating the same ↵Bruno Cardoso Lopes2010-08-251-5/+51
| | | | | | isel behavior for now, so we can pass all vector shuffle tests llvm-svn: 112017
* Fix predicate and add a comment.Eric Christopher2010-08-241-1/+2
| | | | llvm-svn: 111981
* Rework braindead conditionals I put in yesterday.Eric Christopher2010-08-241-14/+12
| | | | llvm-svn: 111974
* Fix thumb2 mode loads to have the correct operand ordering. Add a todoEric Christopher2010-08-241-4/+9
| | | | | | to fix this in the port. llvm-svn: 111973
* Add ARM heuristic for when to allocate a virtual base register for stackJim Grosbach2010-08-242-8/+46
| | | | | | access. rdar://8277890&7352504 llvm-svn: 111968
* MC/X86: Tweak imul recognition, previous hack only applies for the imul formDaniel Dunbar2010-08-241-1/+3
| | | | | | taking immediates. llvm-svn: 111950
* MC/X86: Add custom hack for recognizing "imul $12, %eax" and friends.Daniel Dunbar2010-08-241-0/+8
| | | | llvm-svn: 111947
* MC/X86: Warn on scale factors > 1 without index register, instead of erroring,Daniel Dunbar2010-08-241-3/+4
| | | | | | for 'as' compatibility. llvm-svn: 111945
* Move enabling the local stack allocation pass into the target where it belongs.Jim Grosbach2010-08-242-1/+11
| | | | | | | For now it's still a command line option, but the interface to the generic code doesn't need to know that. llvm-svn: 111942
* add ARM cmd line option to force always using virtual base regs when possible.Jim Grosbach2010-08-241-4/+16
| | | | | | | Intended to help ease reproducing problems by increasing base register usage after heuristics for only using the when needed are in place. llvm-svn: 111930
* Fix X86's isLegalAddressingMode to recognize that static addressesDan Gohman2010-08-241-1/+3
| | | | | | need not be RIP-relative in small mode. llvm-svn: 111917
* Fix SPU BE to use all the available return registers.Kalle Raiskila2010-08-241-34/+16
| | | | | | llc used to assert on the added testcase. llvm-svn: 111911
* Remove some dead code from SPU BE that remainedKalle Raiskila2010-08-243-26/+6
| | | | | | from 64bit vector support. llvm-svn: 111910
* Use pshufhw and pshuflw in more cases and fix getTargetShuffleNode number of ↵Bruno Cardoso Lopes2010-08-242-2/+18
| | | | | | arguments llvm-svn: 111890
* Add comments for what the condition code symbols mean.Bill Wendling2010-08-241-16/+16
| | | | llvm-svn: 111889
* Update comment.Eric Christopher2010-08-241-1/+2
| | | | llvm-svn: 111887
* Fix the opcode and the operands for the load instruction.Eric Christopher2010-08-241-2/+5
| | | | llvm-svn: 111885
* Add register class hack that needs to go away, but makes it more obviousEric Christopher2010-08-241-12/+35
| | | | | | | | that it needs to go away. Use loadRegFromStackSlot where possible. Also, remember to update the value map. llvm-svn: 111883
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