| Commit message (Collapse) | Author | Age | Files | Lines |
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This does not move entirely to UAL syntax, since the default "increment after"
suffix is empty but we still use "IA" for that.
llvm-svn: 98635
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llvm-svn: 98616
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with the integrated assembler!
llvm-svn: 98615
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llvm-svn: 98596
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- Although it would be nice to allow this decoupling, the assembler needs to be able to reason about MCSymbolRefExprs in too many places to make this viable. We can use a target specific encoding of the variant if this becomes an issue.
- This patch also extends llvm-mc to support parsing of the modifiers, as opposed to lumping them in with the symbol.
llvm-svn: 98592
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32-bit indices. Instead of shuffling each element out of the index vector,
when all indices are needed, just store the input vector to the stack and
load the elements out.
llvm-svn: 98588
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Radar 7459078.
llvm-svn: 98586
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external relocations, but we don't have x86_64 relocations yet).
llvm-svn: 98583
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section, remove the target-specific code that performs this.
llvm-svn: 98580
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llvm-svn: 98578
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to is local to the translation unit, we need to place fill the value of that
symbol into the non-lazy pointer.
This should conclude all Darwin changes for placing the LSDA into the TEXT
section. There is some cleanup to do. I.e., there's no longer a special need for
target-specific code here. But that can come later.
llvm-svn: 98564
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llvm-svn: 98561
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where it uses types consistently.
llvm-svn: 98532
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llvm-svn: 98531
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llvm-svn: 98530
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to re-instrument the code. We depend on the system valgrind.h to
avoid adding a new license.
llvm-svn: 98529
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doesn't have a type constraint on the scalar because we don't have
an 'sAny' type.
llvm-svn: 98527
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llvm-svn: 98523
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fix the rest of the buildbot failures on non-x86 hosts.
llvm-svn: 98522
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(at least) on non-x86 builders.
llvm-svn: 98520
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llvm-svn: 98510
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the operand type.
llvm-svn: 98507
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llvm-svn: 98503
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llvm-svn: 98502
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PR4841. Patch by Craig Smith!
llvm-svn: 98496
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llvm-svn: 98494
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MachineInstr -> MCInst. This is what the assembler backend wants,
it relaxes from smaller to larger things. This fixes rdar://7750815
llvm-svn: 98493
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to get unique assembler temporary labels.
llvm-svn: 98489
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contain an MCSymbol instead of a label index.
llvm-svn: 98482
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with an MCSymbol instead of an immediate.
llvm-svn: 98481
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llvm-svn: 98474
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support to allow loads to be folded to tail call instructions.
llvm-svn: 98465
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an MCSymbol. Make the EH_LABEL MachineInstr hold its label
with an MCSymbol instead of ID. Fix a bug in MMI.cpp which
would return labels named "Label4" instead of "label4".
llvm-svn: 98463
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instead of label ID's. This cleans up and regularizes a bunch
of code and makes way for future progress.
Unfortunately, this pointed out to me that JITDwarfEmitter.cpp
is largely copy and paste from DwarfException/MachineModuleInfo
and other places. This is very sad and disturbing. :(
One major change here is that TidyLandingPads moved from being
called in DwarfException::BeginFunction to being called in
DwarfException::EndFunction. There should not be any
functionality change from doing this, but I'm not an EH expert.
llvm-svn: 98459
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llvm-svn: 98458
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llvm-svn: 98457
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llvm-svn: 98451
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and passing off ownership to AsmPrinter. Now MachineModuleInfo
creates it and owns it by value. This allows us to use MCSymbols
more consistently throughout the rest of the code generator, and
simplifies a bit of code. This also allows MachineFunction to
keep an MCContext reference handy, and cleans up the TargetRegistry
interfaces for AsmPrinters.
llvm-svn: 98450
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llvm-svn: 98444
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llvm-svn: 98443
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llvm-svn: 98431
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llvm-svn: 98430
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base register updating load/store-multiple instructions.
llvm-svn: 98427
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targets. This is a temporary hack for the .o file writer that Daniel
wants :)
llvm-svn: 98413
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writebacks to the address register. This gets rid of the hack that the
first register on the list was the magic writeback register operand. There
was an implicit constraint that if that operand was not reg0 it had to match
the base register operand. The post-RA scheduler's antidependency breaker
did not understand that constraint and sometimes changed one without the
other. This also fixes Radar 7495976 and should help the verifier work
better for ARM code.
There are now new ld/st instructions explicit writeback operands and explicit
constraints that tie those registers together.
llvm-svn: 98409
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other functionality on 403.gcc compiled at -O0.
llvm-svn: 98405
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mostly the same.
llvm-svn: 98402
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llvm-svn: 98398
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llvm-svn: 98395
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llvm-svn: 98394
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