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* another const prop failure.Chris Lattner2009-11-111-0/+9
| | | | llvm-svn: 86848
* add a noteChris Lattner2009-11-111-0/+28
| | | | llvm-svn: 86847
* The TBB and TBH instructions for Thumb2 are really handy for jump tables, butJim Grosbach2009-11-111-3/+96
| | | | | | | | | | | can only branch forward. To best take advantage of them, we'd like to adjust the basic blocks around a bit when reasonable. This patch puts basics in place to do that, with a super-simple algorithm for backwards jump table targets that creates a new branch after the jump table which branches backwards. Real heuristics for reordering blocks or other modifications rather than inserting branches will follow. llvm-svn: 86791
* llvm-gcc/clang don't (won't?) need this hack.Daniel Dunbar2009-11-111-1/+2
| | | | llvm-svn: 86769
* add a noteChris Lattner2009-11-101-0/+2
| | | | llvm-svn: 86756
* I did this a week or two agoChris Lattner2009-11-101-6/+0
| | | | llvm-svn: 86754
* Don't mark conditional branch instructions as control barriers.Dan Gohman2009-11-101-14/+16
| | | | llvm-svn: 86732
* Modify how the prologue encoded the "move" information for the FDE. GCCBill Wendling2009-11-101-31/+42
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | generates a sequence similar to this: __Z4funci: LFB2: mflr r0 LCFI0: stmw r30,-8(r1) LCFI1: stw r0,8(r1) LCFI2: stwu r1,-80(r1) LCFI3: mr r30,r1 LCFI4: where LCFI3 and LCFI4 are used by the FDE to indicate what the FP, LR, and other things are. We generated something more like this: Leh_func_begin1: mflr r0 stw r31, 20(r1) stw r0, 8(r1) Llabel1: stwu r1, -80(r1) Llabel2: mr r31, r1 Note that we are missing the "mr" instruction. This patch makes it more like the GCC output. llvm-svn: 86729
* Change Thumb1 address mode printing, instead ofEvan Cheng2009-11-101-5/+2
| | | | | | | | | | [r0, #2 * 4] Now [r0, #8] This makes Thumb2 assembly more uniform and frankly the scale doesn't add much. llvm-svn: 86707
* Add a comment.Evan Cheng2009-11-101-0/+2
| | | | llvm-svn: 86706
* Add a monstrous hack to improve X86ISelDAGToDAG compile time.Daniel Dunbar2009-11-101-0/+8
| | | | | | | | | | - Force NDEBUG on in any Release build. This drops the compile time to ~100s from ~600s, in Release mode. - This may just be a temporary workaround, I don't know the true nature of the gcc-4.2 compile time performance problem. llvm-svn: 86695
* Fix PR5445Bruno Cardoso Lopes2009-11-101-1/+1
| | | | llvm-svn: 86651
* Fix DenseMap iterator constness.Jeffrey Yasskin2009-11-102-6/+6
| | | | | | | | | | | | | | | | | | | This patch forbids implicit conversion of DenseMap::const_iterator to DenseMap::iterator which was possible because DenseMapIterator inherited (publicly) from DenseMapConstIterator. Conversion the other way around is now allowed as one may expect. The template DenseMapConstIterator is removed and the template parameter IsConst which specifies whether the iterator is constant is added to DenseMapIterator. Actually IsConst parameter is not necessary since the constness can be determined from KeyT but this is not relevant to the fix and can be addressed later. Patch by Victor Zverovich! llvm-svn: 86636
* Fixed to address code review. No functional changes.David Goodwin2009-11-105-13/+35
| | | | llvm-svn: 86634
* Allow targets to specify register classes whose member registers should not ↵David Goodwin2009-11-102-4/+10
| | | | | | be renamed to break anti-dependencies. llvm-svn: 86628
* Now that the default is 'enabled,' a separate command line option for ARM isJim Grosbach2009-11-091-8/+1
| | | | | | not necessary. llvm-svn: 86621
* Enable dynamic stack realignment by default.Jim Grosbach2009-11-091-1/+1
| | | | llvm-svn: 86604
* Set dynamic stack realignment to real values.Jim Grosbach2009-11-091-11/+3
| | | | llvm-svn: 86602
* Similar to r86588, but for Darwin this time.Bill Wendling2009-11-091-3/+3
| | | | llvm-svn: 86592
* The jump table was being generated before the end label for exception handlingBill Wendling2009-11-091-3/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | was generated. This caused code like this: ## The asm code for the function .section __TEXT,__const .align 2 lJTI11_0: LJTI11_0: .long LBB11_16 .long LBB11_4 .long LBB11_5 .long LBB11_6 .long LBB11_7 .long LBB11_8 .long LBB11_9 .long LBB11_10 .long LBB11_11 .long LBB11_12 .long LBB11_13 .long LBB11_14 Leh_func_end11: ## <---now in the wrong section! The `Leh_func_end11' would then end up in the wrong section, causing the resulting EH frame information to be wrong: __ZL11CheckRightsjPKcbRbRP6NSData.eh: .set Lset500eh,Leh_frame_end11-Leh_frame_begin11 .long Lset500eh ; Length of Frame Information Entry Leh_frame_begin11: .long Leh_frame_begin11-Leh_frame_common .long Leh_func_begin11-. .set Lset501eh,Leh_func_end11-Leh_func_begin11 .long Lset501eh ; FDE address range `Lset501eh' is now something huge instead of the real value. The X86 back-end generates the jump table after the EH information is emitted. Do the same here. llvm-svn: 86588
* Work around assembler not recognizing #0.0 form immediate for vmcpJim Grosbach2009-11-091-2/+2
| | | | llvm-svn: 86548
* Fix PR5149.Bruno Cardoso Lopes2009-11-092-8/+6
| | | | | | http://llvm.org/bugs/show_bug.cgi?id=5149 llvm-svn: 86543
* Use Unified Assembly Syntax for the ARM backend.Jim Grosbach2009-11-0917-295/+294
| | | | llvm-svn: 86494
* Add and-not (bic) patterns. Based heavily on patch by Brian Lucas!Anton Korobeynikov2009-11-081-1/+31
| | | | llvm-svn: 86471
* Move OR patterns upper to all logical stuff. No functionality change.Anton Korobeynikov2009-11-081-56/+56
| | | | llvm-svn: 86470
* Some nice peephole patterns. Based on patch by Brian Lucas!Anton Korobeynikov2009-11-081-0/+7
| | | | llvm-svn: 86469
* Print tab before operand of jccAnton Korobeynikov2009-11-081-1/+1
| | | | llvm-svn: 86468
* Fix invalid operand updates & implement post-inc memory operandsAnton Korobeynikov2009-11-082-16/+94
| | | | llvm-svn: 86466
* Throw an error when stack realignment stuff fails instead of silentAnton Korobeynikov2009-11-081-3/+7
| | | | | | code miscompilation llvm-svn: 86463
* Make TargetData::getStringRepresentation spit out native integer types,Chris Lattner2009-11-081-0/+7
| | | | | | this gives llvm-gcc generated modules the right data. llvm-svn: 86435
* Use aligned load/store instructions for spilling Q registers when we know ↵Jim Grosbach2009-11-082-8/+25
| | | | | | the stack slot is 128 bit aligned llvm-svn: 86425
* Refactor code.Evan Cheng2009-11-087-127/+67
| | | | llvm-svn: 86423
* x86 vector shuffle cleanup/fixes:Nate Begeman2009-11-073-50/+27
| | | | | | | | 1. rename the movhp patfrag to movlhps, since thats what it actually matches 2. eliminate the bogus movhps load and store patterns, they were incorrect. The load transforms are already handled (correctly) by shufps/unpack. 3. revert a recent test change to its correct form. llvm-svn: 86415
* 80-column cleanup of file header commentsJim Grosbach2009-11-0710-13/+16
| | | | llvm-svn: 86408
* Support alignment specifier for NEON vld/vst instructionsJim Grosbach2009-11-075-46/+61
| | | | llvm-svn: 86404
* Improve tail call elimination to handle the switch statement.Nick Lewycky2009-11-071-16/+0
| | | | llvm-svn: 86403
* t2ldrpci_pic can be used for blockaddress as well.Evan Cheng2009-11-072-6/+28
| | | | llvm-svn: 86400
* indicate what the native integer types for the target are.Chris Lattner2009-11-0712-19/+19
| | | | | | Please verify. llvm-svn: 86397
* First try of the post-inc operands handling... Not fully worked, though :(Anton Korobeynikov2009-11-073-11/+87
| | | | llvm-svn: 86386
* Add some dummy support for post-incremented loadsAnton Korobeynikov2009-11-074-4/+97
| | | | llvm-svn: 86385
* Add 8 bit libcalls and make use of them for msp430Anton Korobeynikov2009-11-071-0/+11
| | | | llvm-svn: 86384
* Add few pseudo-source-valuesAnton Korobeynikov2009-11-071-4/+20
| | | | llvm-svn: 86383
* Initial support for addrmode handling. Tests by Brian Lucas!Anton Korobeynikov2009-11-073-68/+239
| | | | llvm-svn: 86382
* Some preliminary variable asmprintingAnton Korobeynikov2009-11-073-7/+92
| | | | llvm-svn: 86381
* Use '.L' for global private prefix (as mspgcc)Anton Korobeynikov2009-11-071-0/+1
| | | | llvm-svn: 86380
* Drop old asmprinter stuffAnton Korobeynikov2009-11-073-17/+20
| | | | llvm-svn: 86379
* It turns out that the testcase in question uncovered subreg-handling bug.Anton Korobeynikov2009-11-072-3/+2
| | | | | | | Add assert in asmprinter to catch such cases and xfail the tests. PR is to be filled. llvm-svn: 86375
* add the ability for TargetData to return information about legal integerChris Lattner2009-11-071-39/+12
| | | | | | | | | | | datatypes on a given CPU. This is intended to allow instcombine and other transformations to avoid converting big sequences of operations to an inconvenient width, and will help clean up after SRoA. See also "Adding legal integer sizes to TargetData" on Feb 1, 2009 on llvmdev, and PR3451. Comments welcome. llvm-svn: 86370
* more cleanup.Chris Lattner2009-11-071-4/+14
| | | | llvm-svn: 86369
* add some missing #includesChris Lattner2009-11-077-5/+9
| | | | llvm-svn: 86367
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