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* rewrite TargetData to use StringRef/raw_ostream instead of thrashing ↵Chris Lattner2009-11-071-39/+59
| | | | | | std::strings. llvm-svn: 86366
* Make the need-stub variables accurate and consistent. In the case ofJeffrey Yasskin2009-11-072-18/+19
| | | | | | | | | | | | | MachineRelocations, "stub" always refers to a far-call stub or a load-a-faraway-global stub, so this patch adds "Far" to the term. (Other stubs are used for lazy compilation and dlsym address replacement.) The variable was also inconsistent between the positive and negative sense, and the positive sense ("NeedStub") was more demanding than is accurate (since a nearby-enough function can be called directly even if the platform often requires a stub). Since the negative sense causes double-negatives, I switched to "MayNeedFarStub" globally. llvm-svn: 86363
* Fix a couple of shuffle patterns to use movhlps insteadEric Christopher2009-11-071-9/+9
| | | | | | | of movhps as the constraint. Changes optimizations so update testcases as appropriate as well. llvm-svn: 86360
* Fixed Overload table bug noticed by JakobMon P Wang2009-11-071-1/+0
| | | | llvm-svn: 86332
* Refactor code. Fix a potential missing check. Teach isIdentical() about ↵Evan Cheng2009-11-075-30/+41
| | | | | | tLDRpci_pic. llvm-svn: 86330
* - Add TargetInstrInfo::isIdentical(). It's similar to MachineInstr::isIdenticalEvan Cheng2009-11-074-2/+54
| | | | | | | | | | except it doesn't care if the definitions' virtual registers differ. This is used by machine LICM and other MI passes to perform CSE. - Teach Thumb2InstrInfo::isIdentical() to check two t2LDRpci_pic are identical. Since pc relative constantpool entries are always different, this requires it it check if the values can actually the same. llvm-svn: 86328
* Update CMake file.Ted Kremenek2009-11-071-0/+1
| | | | llvm-svn: 86325
* Add code to check at SelectionDAGISel::LowerArguments time to see if return ↵Kenneth Uildriks2009-11-072-0/+17
| | | | | | values can be lowered to registers. Coming soon, code to perform sret-demotion if return values cannot be lowered to registers llvm-svn: 86324
* My previous patch (r84124) for setting the encoding bits 4 and 7 of DPSoRegFrmJohnny Chen2009-11-071-34/+9
| | | | | | | | | was wrong and too aggressive in the sense that DPSoRegFrm includes both constant shifts (with Inst{4} = 0) and register controlled shifts (with Inst{4} = 1 and Inst{7} = 0). The 'rr' fragment of the multiclass definitions actually means register/register with no shift, see A8-11. llvm-svn: 86319
* 80-columnsJim Grosbach2009-11-071-1/+1
| | | | llvm-svn: 86310
* - Add pseudo instructions tLDRpci_pic and t2LDRpci_pic which does a pc-relativeEvan Cheng2009-11-0613-55/+253
| | | | | | | | | | | | load of a GV from constantpool and then add pc. It allows the code sequence to be rematerializable so it would be hoisted by machine licm. - Add a late pass to break these pseudo instructions into a number of real instructions. Also move the code in Thumb2 IT pass that breaks up t2MOVi32imm to this pass. This is done before post regalloc scheduling to allow the scheduler to proper schedule these instructions. It also allow them to be if-converted and shrunk by later passes. llvm-svn: 86304
* Honour subreg machine operands during asmprintingAnton Korobeynikov2009-11-061-0/+3
| | | | llvm-svn: 86303
* Print VMOV (immediate) operands as hexadecimal values. Apple's assemblerBob Wilson2009-11-063-8/+39
| | | | | | | | | will not accept negative values for these. LLVM's default operand printing sign extends values, so that valid unsigned values appear as negative immediates. Print all VMOV immediate operands as hex values to resolve this. Radar 7372576. llvm-svn: 86301
* Remove ARMPCLabelIndex from ARMISelLowering. Use ↵Evan Cheng2009-11-062-13/+38
| | | | | | ARMFunctionInfo::createConstPoolEntryUId() instead. llvm-svn: 86294
* Pass StringRef by value.Daniel Dunbar2009-11-064-7/+4
| | | | llvm-svn: 86251
* Factor out the printing of the leading tab into printInlineAsm.Dan Gohman2009-11-063-3/+0
| | | | llvm-svn: 86199
* Use SUBREG_TO_REG instead of INSERT_SUBREG to model x86-64'sDan Gohman2009-11-051-5/+3
| | | | | | implicit zero-extend. llvm-svn: 86196
* Remove uninteresting and confusing debug output.Dan Gohman2009-11-0511-20/+1
| | | | llvm-svn: 86149
* add a note from PR5313Chris Lattner2009-11-051-0/+34
| | | | llvm-svn: 86146
* Reintroduce support for overloading target intrinsicsMon P Wang2009-11-052-3/+55
| | | | llvm-svn: 86114
* Grammar.Jim Grosbach2009-11-041-1/+1
| | | | llvm-svn: 86068
* Now that the memory leak from McCat/08-main has been fixed (86056), re-enableJim Grosbach2009-11-041-3/+9
| | | | | | | aggressive testing of dynamic stack alignment. Note that this is off by default, and enabled for LLCBETA nightly results. llvm-svn: 86064
* If a function has no stack frame at all, dynamic realignment isn't necessary.Jim Grosbach2009-11-041-0/+1
| | | | llvm-svn: 86057
* dynamic stack realignment necessitates scanning the floating point callee-Jim Grosbach2009-11-041-2/+2
| | | | | | saved instructions even if no stack adjustment for those saves is needed. llvm-svn: 86056
* Add PowerPC codegen for indirect branches.Bob Wilson2009-11-045-0/+45
| | | | llvm-svn: 86050
* Print out an informative comment for KILL instructions.Jakob Stoklund Olesen2009-11-043-0/+3
| | | | | | | | The KILL pseudo-instruction may survive to the asm printer pass, just like the IMPLICIT_DEF. Print the KILL as a comment instead of just leaving a blank line in the output. With -asm-verbose=0, a blank line is printed, like IMPLICIT?DEF. llvm-svn: 86041
* The .n suffix must go after the predicate.Evan Cheng2009-11-041-1/+1
| | | | llvm-svn: 86019
* Use ldr.n to workaround a darwin assembler bug.Evan Cheng2009-11-041-1/+2
| | | | llvm-svn: 85980
* Fix t2Int_eh_sjlj_setjmp. Immediate form of orr is a 32-bit instruction. So ↵Evan Cheng2009-11-032-2/+2
| | | | | | it should be 22 bytes instead of 20 bytes long. llvm-svn: 85965
* fconsts / fconstd immediate should be proceeded with #.Evan Cheng2009-11-031-2/+2
| | | | llvm-svn: 85952
* Move subtarget check upper for NEON reg-reg fixup pass.Anton Korobeynikov2009-11-032-6/+4
| | | | llvm-svn: 85914
* Trim unnecessary include.Evan Cheng2009-11-031-1/+0
| | | | llvm-svn: 85878
* For Thumb indirect branches, use "mov pc, reg" which does not switchBob Wilson2009-11-031-1/+1
| | | | | | | between ARM/Thumb modes and does not require the low bit of the target address to be set for Thumb. llvm-svn: 85874
* Fix PR5367. QPR_8 is the super regclass of DPR_8 and SPR_8.Evan Cheng2009-11-031-2/+9
| | | | llvm-svn: 85871
* Clean up copyRegToReg.Evan Cheng2009-11-031-27/+13
| | | | llvm-svn: 85870
* Add QPR_8 as a superreg class of SPR_8 and DPR_8.Evan Cheng2009-11-031-0/+7
| | | | llvm-svn: 85869
* Update CMake file.Ted Kremenek2009-11-031-1/+2
| | | | llvm-svn: 85861
* Turn neon reg-reg moves fixup code into separate pass. This should reduce ↵Anton Korobeynikov2009-11-034-35/+152
| | | | | | the compile time. llvm-svn: 85850
* Revert r85049, it is causing PR5367Anton Korobeynikov2009-11-031-0/+2
| | | | llvm-svn: 85847
* Revert previous change to a comment. The BlockAddresses go in theBob Wilson2009-11-031-6/+6
| | | | | | constant pool so they don't get wrapped separately. llvm-svn: 85844
* Put BlockAddresses into ARM constant pools.Bob Wilson2009-11-024-5/+19
| | | | llvm-svn: 85824
* Fix ARMAsmParser::ParseMemoryOffsetReg() where the parameter OffsetRegNum shouldKevin Enderby2009-11-021-2/+2
| | | | | | have been passed as a reference. llvm-svn: 85823
* Fix schedule model for BFC.David Goodwin2009-11-022-2/+2
| | | | llvm-svn: 85809
* Hyphenate some comments.Bob Wilson2009-11-021-3/+2
| | | | llvm-svn: 85808
* Add support for BlockAddress values in ARM constant pools.Bob Wilson2009-11-024-20/+41
| | | | llvm-svn: 85806
* Prune unnecessary include.Bob Wilson2009-11-021-1/+0
| | | | llvm-svn: 85805
* These are done / no longer care.Evan Cheng2009-11-021-21/+0
| | | | llvm-svn: 85798
* Add an entry.Evan Cheng2009-11-021-0/+3
| | | | llvm-svn: 85797
* Unbreak ARMBaseRegisterInfo::copyRegToReg.Evan Cheng2009-11-021-18/+19
| | | | llvm-svn: 85787
* Handle splats of undefs properly. This includes the testcase for PR5364 as well.Anton Korobeynikov2009-11-021-0/+3
| | | | llvm-svn: 85767
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