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* Revert r169638 because it broke Mesa llvmpipe tests.Nadav Rotem2013-02-241-6/+1
| | | | | | Fix PR15239. llvm-svn: 175985
* X86: Disable cmov-memory patterns on subtargets without cmov.Benjamin Kramer2013-02-231-6/+8
| | | | | | Fixes PR15115. llvm-svn: 175962
* x86_64: designate most general purpose and SSE registers as callee save ↵Peter Collingbourne2013-02-222-21/+28
| | | | | | under coldcc llvm-svn: 175911
* Move the eliminateCallFramePseudoInstr method from TargetRegisterInfoEli Bendersky2013-02-214-107/+87
| | | | | | | | | | | | | | | to TargetFrameLowering, where it belongs. Incidentally, this allows us to delete some duplicated (and slightly different!) code in TRI. There are potentially other layering problems that can be cleaned up as a result, or in a similar manner. The refactoring was OK'd by Anton Korobeynikov on llvmdev. Note: this touches the target interfaces, so out-of-tree targets may be affected. llvm-svn: 175788
* getX86SubSuperRegister has a special mode with High=true for i64 whichEli Bendersky2013-02-211-17/+9
| | | | | | | | | | exists solely to enable it to call itself for i8 with some registers. The proposed patch simplifies the function somewhat to make the High bit only meaningful for the i8 mode, which makes sense. No functional difference (getX86SubSuperRegister is not getting called from anywhere outside with i64 and High=true). llvm-svn: 175762
* MCParser: Update method names per coding guidelines.Jim Grosbach2013-02-201-15/+15
| | | | | | | | | | | | | | | | | | | s/AddDirectiveHandler/addDirectiveHandler/ s/ParseMSInlineAsm/parseMSInlineAsm/ s/ParseIdentifier/parseIdentifier/ s/ParseStringToEndOfStatement/parseStringToEndOfStatement/ s/ParseEscapedString/parseEscapedString/ s/EatToEndOfStatement/eatToEndOfStatement/ s/ParseExpression/parseExpression/ s/ParseParenExpression/parseParenExpression/ s/ParseAbsoluteExpression/parseAbsoluteExpression/ s/CheckForValidSection/checkForValidSection/ http://llvm.org/docs/CodingStandards.html#name-types-functions-variables-and-enumerators-properly No functional change intended. llvm-svn: 175675
* Update TargetLowering ivars for name policy.Jim Grosbach2013-02-201-8/+8
| | | | | | | | | | | http://llvm.org/docs/CodingStandards.html#name-types-functions-variables-and-enumerators-properly ivars should be camel-case and start with an upper-case letter. A few in TargetLowering were starting with a lower-case letter. No functional change intended. llvm-svn: 175667
* [ms-inline asm] Make the comment a bit more verbose.Chad Rosier2013-02-201-2/+6
| | | | llvm-svn: 175641
* I optimized the following patterns:Elena Demikhovsky2013-02-202-0/+40
| | | | | | | | | | | | | | | | sext <4 x i1> to <4 x i64> sext <4 x i8> to <4 x i64> sext <4 x i16> to <4 x i64> I'm running Combine on SIGN_EXTEND_IN_REG and revert SEXT patterns: (sext_in_reg (v4i64 anyext (v4i32 x )), ExtraVT) -> (v4i64 sext (v4i32 sext_in_reg (v4i32 x , ExtraVT))) The sext_in_reg (v4i32 x) may be lowered to shl+sar operations. The "sar" does not exist on 64-bit operation, so lowering sext_in_reg (v4i64 x) has no vector solution. I also added a cost of this operations to the AVX costs table. llvm-svn: 175619
* [ms-inline asm] Force the use of a base pointer if the MachineFunction includesChad Rosier2013-02-191-2/+4
| | | | | | | | | | | | | MS-style inline assembly. This is a follow-on to r175334. Forcing a FP to be emitted doesn't ensure it will be used. Therefore, force the base pointer as well. We now treat MS inline assembly in the same way we treat functions with dynamic stack realignment and VLAs. This guarantees the BP will be used to reference parameters and locals. rdar://13218191 llvm-svn: 175576
* Add obvious constantness.Jakub Staszak2013-02-191-2/+2
| | | | llvm-svn: 175560
* Clean up HiPE prologue emission a bit and avoid signed arithmetic tricks.Benjamin Kramer2013-02-191-43/+47
| | | | | | No intended functionality change. llvm-svn: 175536
* Move LLVM_LIBRARY_VISIBILITY for consistency with what was done toRafael Espindola2013-02-191-1/+1
| | | | | | PPCJITInfo.cpp in r175394. llvm-svn: 175531
* Make pass name more precise and fix comment.Eli Bendersky2013-02-191-6/+2
| | | | llvm-svn: 175525
* Fix capitalization in comment to match function name.Craig Topper2013-02-191-1/+1
| | | | llvm-svn: 175497
* Use array_pod_sort instead of std::sort.Jakub Staszak2013-02-181-2/+2
| | | | llvm-svn: 175472
* X86FrameLowering.cpp: Fixup. Sorry for the breakage.NAKAMURA Takumi2013-02-181-1/+1
| | | | llvm-svn: 175467
* X86FrameLowering.cpp: Fix a warning in -Asserts. [-Wunused-variable]NAKAMURA Takumi2013-02-181-2/+1
| | | | llvm-svn: 175464
* Remove a useless assert.Chad Rosier2013-02-181-1/+0
| | | | llvm-svn: 175463
* Fix a 32/64 bit incompatibility in the HiPE prologue generation.Benjamin Kramer2013-02-181-1/+1
| | | | llvm-svn: 175458
* Support for HiPE-compatible code emission, patch by Yiannis Tsiouris.Benjamin Kramer2013-02-182-5/+157
| | | | llvm-svn: 175457
* X86: Add a note.Benjamin Kramer2013-02-171-0/+9
| | | | llvm-svn: 175408
* Return false instead of 0.Jakub Staszak2013-02-171-1/+1
| | | | llvm-svn: 175402
* [msvc x64] Update X86CompilationCallback_Win64.asm corresponding to r175267.NAKAMURA Takumi2013-02-161-2/+2
| | | | llvm-svn: 175363
* Minor cleanups. No functionality change.Jakub Staszak2013-02-161-9/+8
| | | | llvm-svn: 175359
* Reinitialize the ivars in the subtarget so that they can be reset with the ↵Bill Wendling2013-02-162-33/+41
| | | | | | new features. llvm-svn: 175336
* [ms-inline asm] Do not omit the frame pointer if we have ms-inline assembly.Chad Rosier2013-02-161-1/+1
| | | | | | | | | | | If the frame pointer is omitted, and any stack changes occur in the inline assembly, e.g.: "pusha", then any C local variable or C argument references will be incorrect. I pass no judgement on anyone who would do such a thing. ;) rdar://13218191 llvm-svn: 175334
* Temporary revert of 175320.Bill Wendling2013-02-152-42/+34
| | | | llvm-svn: 175322
* Reinitialize the ivars in the subtarget.Bill Wendling2013-02-152-34/+42
| | | | | | | When we're recalculating the feature set of the subtarget, we need to have the ivars in their initial state. llvm-svn: 175320
* Use the 'target-features' and 'target-cpu' attributes to reset the subtarget ↵Bill Wendling2013-02-152-41/+67
| | | | | | | | | | features. If two functions require different features (e.g., `-mno-sse' vs. `-msse') then we want to honor that, especially during LTO. We can do that by resetting the subtarget's features depending upon the 'target-feature' attribute. llvm-svn: 175314
* [ms-inline asm] Adjust the EndLoc to account for the ']'.Chad Rosier2013-02-151-1/+2
| | | | llvm-svn: 175312
* Give these callbacks hidden visibility. It is better to not export them moreRafael Espindola2013-02-151-1/+2
| | | | | | | than we need to and some ELF linkers complain about directly accessing symbols with default visibility. llvm-svn: 175268
* Don't make assumptions about the mangling of static functions in extern "C"Rafael Espindola2013-02-151-20/+10
| | | | | | | | blocks. We still don't have consensus if we should try to change clang or the standard, but llvm should work with compilers that implement the current standard and mangle those functions. llvm-svn: 175267
* Make helpers static. Add missing include so LLVMInitializeObjCARCOpts gets C ↵Benjamin Kramer2013-02-151-1/+1
| | | | | | linkage. llvm-svn: 175264
* The operand listing is very much outdated.Eli Bendersky2013-02-141-5/+2
| | | | llvm-svn: 175220
* Simplify code. Remove "else after return".Jakub Staszak2013-02-141-5/+4
| | | | llvm-svn: 175212
* added basic support for Intel ADX instructionsKay Tiong Khoo2013-02-145-0/+54
| | | | | | -feature flag, instructions definitions, test cases llvm-svn: 175196
* 80-colNadav Rotem2013-02-141-1/+2
| | | | llvm-svn: 175189
* Fixed a bug in X86TargetLowering::LowerVectorIntExtend() (assertion failure).Elena Demikhovsky2013-02-141-3/+17
| | | | | | Added a test. llvm-svn: 175144
* Revert r175120 and r175121. Clang is producing the expected asm names again.Rafael Espindola2013-02-141-0/+6
| | | | llvm-svn: 175133
* Don't assume the mangling of static functions.Rafael Espindola2013-02-141-6/+0
| | | | llvm-svn: 175121
* Don't build tail calls to functions with three inreg arguments on x86-32 PIC.Nick Lewycky2013-02-131-5/+11
| | | | | | Fixes PR15250! llvm-svn: 175092
* [ms-inline-asm] Add support for memory references that have non-immediateChad Rosier2013-02-131-13/+18
| | | | | | | displacements. rdar://12974533 llvm-svn: 175083
* X86: Disable generation of rep;movsl when %esi is used as a base pointer.Benjamin Kramer2013-02-131-0/+8
| | | | | | | | | | | This happens when there is both stack realignment and a dynamic alloca in the function. If we overwrite %esi (rep;movsl uses fixed registers) we'll lose the base pointer and the next register spill will write into oblivion. Fixes PR15249 and unbreaks firefox on i386/freebsd. Mozilla uses dynamic allocas and freebsd a 4 byte stack alignment. llvm-svn: 175057
* Prevent insertion of "vzeroupper" before call that preserves YMM registers, ↵Elena Demikhovsky2013-02-131-0/+10
| | | | | | since a caller uses preserved registers across the call. llvm-svn: 175043
* Check i1 as well as i8 variables for 8 bit registers for x86 inlineEric Christopher2013-02-131-1/+1
| | | | | | assembly. llvm-svn: 175036
* Added 0x0D to 2-byte opcode extension table for prefetch* variantsKay Tiong Khoo2013-02-121-4/+2
| | | | | | | Fixed decode of existing 3dNow prefetchw instruction Intel is scheduled to add a compatible prefetchw (same encoding) to future CPUs llvm-svn: 174920
* *fixed disassembly of some i386 system insts with intel syntaxKay Tiong Khoo2013-02-111-4/+4
| | | | | | *added file for test cases for i386 intel syntax llvm-svn: 174900
* This is a follow-up on r174446, now taking Atom processors intoEli Bendersky2013-02-061-6/+6
| | | | | | | | | | | | account. Atoms use LEA for updating SP in prologs/epilogs, and the exact LEA opcode depends on the data model. Also reapplying the test case which was added and then reverted (because of Atom failures), this time specifying explicitly the CPU in addition to the triple. The test case now checks all variations (data mode, cpu Atom vs. Core). llvm-svn: 174542
* Make sure the correct opcodes are used to SUB and ADD the stackEli Bendersky2013-02-051-13/+18
| | | | | | | pointer in function prologs/epilogs. The opcodes should depend on the data model (LP64 vs. ILP32) rather than the architecture bit-ness. llvm-svn: 174446
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