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* We are not using DBG_STOPPOINT anymore.Devang Patel2009-11-211-2/+0
| | | | llvm-svn: 89536
* Fix a thinko that caused spurious @GOTOFFs.Dan Gohman2009-11-201-2/+2
| | | | llvm-svn: 89509
* Target-independent support for TargetFlags on BlockAddress operands,Dan Gohman2009-11-206-15/+56
| | | | | | and support for blockaddresses in x86-32 PIC mode. llvm-svn: 89506
* Recommitting PALIGNR shift width fixes.Sean Callanan2009-11-201-8/+8
| | | | | | | Thanks to Daniel Dunbar for fixing clang intrinsics: http://llvm.org/viewvc/llvm-project?view=rev&revision=89499 llvm-svn: 89500
* Reverting PALIGNR fix until I figure out how thisSean Callanan2009-11-201-8/+8
| | | | | | broke the Clang testsuite. llvm-svn: 89495
* Fixed PALIGNR to take 8-bit rotations in all cases.Sean Callanan2009-11-201-8/+8
| | | | | | | Also fixed the corresponding testcase, and the PALIGNR intrinsic (tested for correctness with llvm-gcc). llvm-svn: 89491
* Re-apply 89011. It's not to be blamed.Evan Cheng2009-11-172-4/+7
| | | | llvm-svn: 89081
* Revert 89011. Buildbot thinks it might be breaking stuff.Evan Cheng2009-11-172-7/+4
| | | | llvm-svn: 89076
* MOV64rm should be marked isReMaterializable.Evan Cheng2009-11-171-1/+1
| | | | llvm-svn: 89019
* A few more instructions that should be marked re-materializable.Evan Cheng2009-11-172-4/+7
| | | | llvm-svn: 89011
* Make X86-64 in the Large model always emit 64-bit calls.Jeffrey Yasskin2009-11-164-39/+30
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The large code model is documented at http://www.x86-64.org/documentation/abi.pdf and says that calls should assume their target doesn't live within the 32-bit pc-relative offset that fits in the call instruction. To do this, we turn off the global-address->target-global-address conversion in X86TargetLowering::LowerCall(). The first attempt at this broke the lazy JIT because it can separate the movabs(imm->reg) from the actual call instruction. The lazy JIT receives the address of the movabs as a relocation and needs to record the return address from the call; and then when that call happens, it needs to patch the movabs with the newly-compiled target. We could thread the call instruction into the relocation and record the movabs<->call mapping explicitly, but that seems to require at least as much new complication in the code generator as this change. To fix this, we make lazy functions _always_ go through a call stub. You'd think we'd only have to force lazy calls through a stub on difficult platforms, but that turns out to break indirect calls through a function pointer. The right fix for that is to distinguish between calls and address-of operations on uncompiled functions, but that's complex enough to leave for someone else to do. Another attempt at this defined a new CALL64i pseudo-instruction, which expanded to a 2-instruction sequence in the assembly output and was special-cased in the X86CodeEmitter's emitInstruction() function. That broke indirect calls in the same way as above. This patch also removes a hack forcing Darwin to the small code model. Without far-call-stubs, the small code model requires things of the JITMemoryManager that the DefaultJITMemoryManager can't provide. Thanks to echristo for lots of testing! llvm-svn: 88984
* - Check memoperand alignment instead of checking stack alignment. Most load ↵Evan Cheng2009-11-162-17/+14
| | | | | | | | / store folding instructions are not referencing spill stack slots. - Mark MOVUPSrm re-materializable. llvm-svn: 88974
* Temporary disable the error - it seems to be too conservative.Anton Korobeynikov2009-11-141-3/+4
| | | | llvm-svn: 88800
* Add llvm::sys::getHostCPUName, for detecting the LLVM name for the host CPU.Daniel Dunbar2009-11-141-113/+2
| | | | | | | | | - This is an initial step towards -march=native support in Clang, and towards eliminating host dependencies in the targets. See PR5389. - Patch by Roman Divacky! llvm-svn: 88768
* - Change TargetInstrInfo::reMaterialize to pass in TargetRegisterInfo.Evan Cheng2009-11-142-3/+5
| | | | | | | | - If destination is a physical register and it has a subreg index, use the sub-register instead. This fixes PR5423. llvm-svn: 88745
* The instruction pointer %RIP is a reserved register on x86_64.Jakob Stoklund Olesen2009-11-131-0/+5
| | | | llvm-svn: 88705
* Move DebugInfo checks into EmitComments and remove them fromDavid Greene2009-11-131-1/+1
| | | | | | | | target-specific AsmPrinters. Not all comments need DebugInfo. Re-enable the line numbers comment test. llvm-svn: 88697
* Allow target to specify regclass for which antideps will only be broken ↵David Goodwin2009-11-132-3/+3
| | | | | | along the critical path. llvm-svn: 88682
* Fix a bootstrap failure.David Greene2009-11-132-24/+63
| | | | | | | | Provide special isLoadFromStackSlotPostFE and isStoreToStackSlotPostFE interfaces to explicitly request checking for post-frame ptr elimination operands. This uses a heuristic so it isn't reliable for correctness. llvm-svn: 87047
* Make the MachineFunction argument of getFrameRegister const.David Greene2009-11-121-1/+1
| | | | | | This also fixes a build error. llvm-svn: 87027
* Add hasLoadFromStackSlot and hasStoreToStackSlot to return whether aDavid Greene2009-11-122-12/+79
| | | | | | | | | | | | | | | machine instruction loads or stores from/to a stack slot. Unlike isLoadFromStackSlot and isStoreFromStackSlot, the instruction may be something other than a pure load/store (e.g. it may be an arithmetic operation with a memory operand). This helps AsmPrinter determine when to print a spill/reload comment. This is only a hint since we may not be able to figure this out in all cases. As such, it should not be relied upon for correctness. Implement for X86. Return false by default for other architectures. llvm-svn: 87026
* Add a bool flag to StackObjects telling whether they reference spillDavid Greene2009-11-123-18/+23
| | | | | | | | | | | | | slots. The AsmPrinter will use this information to determine whether to print a spill/reload comment. Remove default argument values. It's too easy to pass a wrong argument value when multiple arguments have default values. Make everything explicit to trap bugs early. Update all targets to adhere to the new interfaces.. llvm-svn: 87022
* Add compare_lower and equals_lower methods to StringRef. Switch all users ofBenjamin Kramer2009-11-121-2/+2
| | | | | | StringsEqualNoCase (from StringExtras.h) to it. llvm-svn: 87020
* Use a tab in INT3's asm string, for consistency.Dan Gohman2009-11-111-1/+1
| | | | llvm-svn: 86850
* llvm-gcc/clang don't (won't?) need this hack.Daniel Dunbar2009-11-111-1/+2
| | | | llvm-svn: 86769
* Add a monstrous hack to improve X86ISelDAGToDAG compile time.Daniel Dunbar2009-11-101-0/+8
| | | | | | | | | | - Force NDEBUG on in any Release build. This drops the compile time to ~100s from ~600s, in Release mode. - This may just be a temporary workaround, I don't know the true nature of the gcc-4.2 compile time performance problem. llvm-svn: 86695
* Fix DenseMap iterator constness.Jeffrey Yasskin2009-11-101-5/+5
| | | | | | | | | | | | | | | | | | | This patch forbids implicit conversion of DenseMap::const_iterator to DenseMap::iterator which was possible because DenseMapIterator inherited (publicly) from DenseMapConstIterator. Conversion the other way around is now allowed as one may expect. The template DenseMapConstIterator is removed and the template parameter IsConst which specifies whether the iterator is constant is added to DenseMapIterator. Actually IsConst parameter is not necessary since the constness can be determined from KeyT but this is not relevant to the fix and can be addressed later. Patch by Victor Zverovich! llvm-svn: 86636
* Fixed to address code review. No functional changes.David Goodwin2009-11-102-5/+11
| | | | llvm-svn: 86634
* Allow targets to specify register classes whose member registers should not ↵David Goodwin2009-11-101-2/+4
| | | | | | be renamed to break anti-dependencies. llvm-svn: 86628
* Throw an error when stack realignment stuff fails instead of silentAnton Korobeynikov2009-11-081-3/+7
| | | | | | code miscompilation llvm-svn: 86463
* x86 vector shuffle cleanup/fixes:Nate Begeman2009-11-073-50/+27
| | | | | | | | 1. rename the movhp patfrag to movlhps, since thats what it actually matches 2. eliminate the bogus movhps load and store patterns, they were incorrect. The load transforms are already handled (correctly) by shufps/unpack. 3. revert a recent test change to its correct form. llvm-svn: 86415
* indicate what the native integer types for the target are.Chris Lattner2009-11-071-3/+3
| | | | | | Please verify. llvm-svn: 86397
* add some missing #includesChris Lattner2009-11-071-0/+1
| | | | llvm-svn: 86367
* Make the need-stub variables accurate and consistent. In the case ofJeffrey Yasskin2009-11-071-14/+14
| | | | | | | | | | | | | MachineRelocations, "stub" always refers to a far-call stub or a load-a-faraway-global stub, so this patch adds "Far" to the term. (Other stubs are used for lazy compilation and dlsym address replacement.) The variable was also inconsistent between the positive and negative sense, and the positive sense ("NeedStub") was more demanding than is accurate (since a nearby-enough function can be called directly even if the platform often requires a stub). Since the negative sense causes double-negatives, I switched to "MayNeedFarStub" globally. llvm-svn: 86363
* Fix a couple of shuffle patterns to use movhlps insteadEric Christopher2009-11-071-9/+9
| | | | | | | of movhps as the constraint. Changes optimizations so update testcases as appropriate as well. llvm-svn: 86360
* Add code to check at SelectionDAGISel::LowerArguments time to see if return ↵Kenneth Uildriks2009-11-072-0/+17
| | | | | | values can be lowered to registers. Coming soon, code to perform sret-demotion if return values cannot be lowered to registers llvm-svn: 86324
* Pass StringRef by value.Daniel Dunbar2009-11-061-2/+1
| | | | llvm-svn: 86251
* Factor out the printing of the leading tab into printInlineAsm.Dan Gohman2009-11-061-1/+0
| | | | llvm-svn: 86199
* Use SUBREG_TO_REG instead of INSERT_SUBREG to model x86-64'sDan Gohman2009-11-051-5/+3
| | | | | | implicit zero-extend. llvm-svn: 86196
* Remove uninteresting and confusing debug output.Dan Gohman2009-11-051-1/+0
| | | | llvm-svn: 86149
* Print out an informative comment for KILL instructions.Jakob Stoklund Olesen2009-11-041-0/+1
| | | | | | | | The KILL pseudo-instruction may survive to the asm printer pass, just like the IMPLICIT_DEF. Print the KILL as a comment instead of just leaving a blank line in the output. With -asm-verbose=0, a blank line is printed, like IMPLICIT?DEF. llvm-svn: 86041
* Do not infer the target type for COPY_TO_REGCLASS from dest regclass, this ↵Anton Korobeynikov2009-11-022-22/+26
| | | | | | | won't work if it can contain several types. Require explicit result type for the node for now. This fixes PR5364. PS: It seems that blackfin usage of copy_to_regclass is completely bogus! llvm-svn: 85766
* improve x86 codegen support for blockaddress. We now compileChris Lattner2009-11-011-6/+14
| | | | | | | | | | | | | | | | | | | | | | the testcase into: _test1: ## @test1 ## BB#0: ## %entry leaq L_test1_bb6(%rip), %rax jmpq *%rax L_test1_bb: ## Address Taken LBB1_1: ## %bb movb $1, %al ret L_test1_bb6: ## Address Taken LBB1_2: ## %bb6 movb $2, %al ret Note, it is very very strange that BlockAddressSDNode doesn't carry around TargetFlags. Dan, please fix this. llvm-svn: 85703
* Fix MachineLICM to use the correct virtual register class whenDan Gohman2009-10-302-3/+9
| | | | | | | | | | unfolding loads for hoisting. getOpcodeAfterMemoryUnfold returns the opcode of the original operation without the load, not the load itself, MachineLICM needs to know the operand index in order to get the correct register class. Extend getOpcodeAfterMemoryUnfold to return this information. llvm-svn: 85622
* Initial x86 support for BlockAddresses.Dan Gohman2009-10-305-0/+40
| | | | llvm-svn: 85557
* Rename usesCustomDAGSchedInserter to usesCustomInserter, and update aDan Gohman2009-10-295-17/+15
| | | | | | | | bunch of associated comments, because it doesn't have anything to do with DAGs or scheduling. This is another step in decoupling MachineInstr emitting from scheduling. llvm-svn: 85517
* X86 palignr intrinsics immediate field is in bits. ISel must transform it ↵Evan Cheng2009-10-281-24/+29
| | | | | | into bytes. llvm-svn: 85379
* Add a second ValueType argument to isFPImmLegal.Evan Cheng2009-10-282-2/+2
| | | | llvm-svn: 85361
* Move and clarify note.Bill Wendling2009-10-271-31/+0
| | | | llvm-svn: 85334
* Note corrected.Bill Wendling2009-10-271-3/+5
| | | | llvm-svn: 85332
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