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* Print all the moves at a given label instead of just the first one.Rafael Espindola2011-04-261-9/+0
| | | | | | Remove previous DwarfCFI hack. llvm-svn: 130187
* Silence an overzealous uninitialized variable warning from GCC.Benjamin Kramer2011-04-231-1/+1
| | | | llvm-svn: 130053
* X86: Try to use a smaller encoding by transforming (X << C1) & C2 into (X & ↵Benjamin Kramer2011-04-221-0/+75
| | | | | | | | | | | | | | | | | | | | | | | (C2 >> C1)) & C1. (Part of PR5039) This tends to happen a lot with bitfield code generated by clang. A simple example for x86_64 is uint64_t foo(uint64_t x) { return (x&1) << 42; } which used to compile into bloated code: shlq $42, %rdi ## encoding: [0x48,0xc1,0xe7,0x2a] movabsq $4398046511104, %rax ## encoding: [0x48,0xb8,0x00,0x00,0x00,0x00,0x00,0x04,0x00,0x00] andq %rdi, %rax ## encoding: [0x48,0x21,0xf8] ret ## encoding: [0xc3] with this patch we can fold the immediate into the and: andq $1, %rdi ## encoding: [0x48,0x83,0xe7,0x01] movq %rdi, %rax ## encoding: [0x48,0x89,0xf8] shlq $42, %rax ## encoding: [0x48,0xc1,0xe0,0x2a] ret ## encoding: [0xc3] It's possible to save another byte by using 'andl' instead of 'andq' but I currently see no way of doing that without making this code even more complicated. See the TODOs in the code. llvm-svn: 129990
* Compute the size of the FDE encoding instead of hard coding it. UpdateRafael Espindola2011-04-221-10/+1
| | | | | | X8664_ELFTargetObjectFile::getFDEEncoding to match reality. llvm-svn: 129959
* Prefer cheap registers for busy live ranges.Jakob Stoklund Olesen2011-04-201-7/+13
| | | | | | | | | | | | | | On the x86-64 and thumb2 targets, some registers are more expensive to encode than others in the same register class. Add a CostPerUse field to the TableGen register description, and make it available from TRI->getCostPerUse. This represents the cost of a REX prefix or a 32-bit instruction encoding required by choosing a high register. Teach the greedy register allocator to prefer cheap registers for busy live ranges (as indicated by spill weight). llvm-svn: 129864
* This should always be signed chars, so use int8_t. This fixes a miscompile whenNick Lewycky2011-04-201-3/+3
| | | | | | | | llvm is built with unsigned chars where an immediate such as 0xff would be zero extended to 64-bits, turning "cmp $0xff,%eax" into "cmp $0xffffffffffffffff,%eax". llvm-svn: 129845
* ADT/Triple: Renambe isOSX... methods to isMacOSX for consistency with the OSDaniel Dunbar2011-04-203-7/+8
| | | | | | triple component. llvm-svn: 129838
* ADT/Triple: Move a variety of clients to using isOSDarwin() and isOSWindows()Daniel Dunbar2011-04-193-51/+37
| | | | | | predicates. llvm-svn: 129816
* Target/X86: Eliminate uses of getDarwinVers().Daniel Dunbar2011-04-194-11/+7
| | | | llvm-svn: 129813
* Target/X86: Add getTargetTriple() accessor.Daniel Dunbar2011-04-191-0/+2
| | | | llvm-svn: 129812
* Add support for FastISel'ing varargs calls.Eli Friedman2011-04-191-4/+21
| | | | llvm-svn: 129765
* Implement support for x86 fastisel of small fixed-sized memcpys, which are ↵Chris Lattner2011-04-191-5/+50
| | | | | | | | | generated en-mass for C++ PODs. On my c++ test file, this cuts the fast isel rejects by 10x and shrinks the generated .s file by 5% llvm-svn: 129755
* tidy upChris Lattner2011-04-191-3/+5
| | | | llvm-svn: 129753
* Implement support for fast isel of calls of i1 arguments, even though they ↵Chris Lattner2011-04-191-10/+23
| | | | | | | | | | | | are illegal, when they are a truncate from something else. This eliminates fully half of all the fastisel rejections on a test c++ file I'm working with, which should make a substantial improvement for -O0 compile of c++ code. This fixed rdar://9297003 - fast isel bails out on all functions taking bools llvm-svn: 129752
* Handle i1/i8/i16 constant integer arguments to calls by prepromoting them.Chris Lattner2011-04-191-9/+22
| | | | | | | | | | | | | | | | | | | | | | | | | Before we would bail out on i1 arguments all together, now we just bail on non-constant ones. Also, we used to emit extraneous code. e.g. test12 was: movb $0, %al movzbl %al, %edi callq _test12 and test13 was: movb $0, %al xorl %edi, %edi movb %al, 7(%rsp) callq _test13f Now we get: movl $0, %edi callq _test12 and: movl $0, %edi callq _test13f llvm-svn: 129751
* be layout aware, to produce:Chris Lattner2011-04-191-1/+8
| | | | | | | | | | | | | | | | | | | testb $1, %al je LBB0_2 ## BB#1: ## %if.then movb $0, %al instead of: testb $1, %al jne LBB0_1 jmp LBB0_2 LBB0_1: ## %if.then movb $0, %al how 'bout that. llvm-svn: 129749
* fix rdar://9297006 - fast isel bails out on trunc to i1 -> bools cry,Chris Lattner2011-04-191-6/+29
| | | | | | a common cause of fast isel rejects on c++ code. llvm-svn: 129748
* Invert the meaning of printAliasInstr's return value. It now returnsEric Christopher2011-04-182-1/+4
| | | | | | true on success and false on failure. Update callers. llvm-svn: 129722
* Add a new bit that ImmLeaf's can opt into, which allows them to duck out ofChris Lattner2011-04-181-3/+6
| | | | | | | | the generated FastISel. X86 doesn't need to generate code to match ADD16ri8 since ADD16ri will do just fine. This is a small codesize win in the generated instruction selector. llvm-svn: 129692
* switch the rest of the x86 immediate patterns over to ImmLeaf, Chris Lattner2011-04-171-17/+9
| | | | | | | simplifying them and exposing more information to tblgen. It would be nice if other target authors adopted this as well, particularly arm since it has fastisel. llvm-svn: 129676
* now that predicates have a decent abstraction layer on them, introduce a new Chris Lattner2011-04-171-1/+6
| | | | | | | | | kind of predicate: one that is specific to imm nodes. The predicate function specified here just checks an int64_t directly instead of messing around with SDNode's. The virtue of this is that it means that fastisel and other things can reason about these predicates. llvm-svn: 129675
* Rework our internal representation of node predicates to expose moreChris Lattner2011-04-171-1/+1
| | | | | | | | structure and fix some fixmes. We now have a TreePredicateFn class that handles all of the decoding of these things. This is an internal cleanup that has no impact on the code generated by tblgen. llvm-svn: 129670
* 1. merge fast-isel-shift-imm.ll into fast-isel-x86-64.llChris Lattner2011-04-171-22/+13
| | | | | | | | | | 2. implement rdar://9289501 - fast isel should fold trivial multiplies to shifts 3. teach tblgen to handle shift immediates that are different sizes than the shifted operands, eliminating some code from the X86 fast isel backend. 4. Have FastISel::SelectBinaryOp use (the poorly named) FastEmit_ri_ function instead of FastEmit_ri to simplify code. llvm-svn: 129666
* fix an x86 fast isel issue where we'd completely give up on folding an addressChris Lattner2011-04-171-71/+71
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | when we have a global variable base an an index. Instead, just give up on folding the global variable. Before we'd geenrate: _test: ## @test ## BB#0: movq _rtx_length@GOTPCREL(%rip), %rax leaq (%rax), %rax addq %rdi, %rax movzbl (%rax), %eax ret now we generate: _test: ## @test ## BB#0: movq _rtx_length@GOTPCREL(%rip), %rax movzbl (%rax,%rdi), %eax ret The difference is even more significant when there is a scale involved. This fixes rdar://9289558 - total fail with addr mode formation at -O0/x86-64 llvm-svn: 129664
* fix an oversight which caused us to compile the testcase (and otherChris Lattner2011-04-171-4/+7
| | | | | | | | | | | | | | | | | | | less trivial things) into a dummy lea. Before we generated: _test: ## @test movq _G@GOTPCREL(%rip), %rax leaq (%rax), %rax ret now we produce: _test: ## @test movq _G@GOTPCREL(%rip), %rax ret This is part of rdar://9289558 llvm-svn: 129662
* tidy up and reduce indentation.Chris Lattner2011-04-171-37/+39
| | | | llvm-svn: 129661
* Remove working entry from README.Eli Friedman2011-04-171-8/+0
| | | | llvm-svn: 129654
* Add 129518 back with a fix for when we are producing eh just because of ↵Rafael Espindola2011-04-152-2/+14
| | | | | | | | | debug info. Change ELF systems to use CFI for producing the EH tables. This reduces the size of the clang binary in Debug builds from 690MB to 679MB. llvm-svn: 129571
* Fix a ton of comment typos found by codespell. Patch byChris Lattner2011-04-1513-22/+22
| | | | | | Luis Felipe Strano Moraes! llvm-svn: 129558
* Revert r129518, "Change ELF systems to use CFI for producing the EH tables. ↵NAKAMURA Takumi2011-04-152-14/+2
| | | | | | | | This reduces the" It broke several builds. llvm-svn: 129557
* Add 3DNow! intrinsics.Michael J. Spencer2011-04-152-49/+75
| | | | llvm-svn: 129551
* move PR9661 out to here.Chris Lattner2011-04-141-0/+24
| | | | llvm-svn: 129527
* Change ELF systems to use CFI for producing the EH tables. This reduces theRafael Espindola2011-04-142-2/+14
| | | | | | size of the clang binary in Debug builds from 690MB to 679MB. llvm-svn: 129518
* Fix whitespace and tabs.Michael J. Spencer2011-04-141-3/+3
| | | | llvm-svn: 129517
* As Dan pointed out, movzbl, movsbl, and friends are nicer than their aliasBill Wendling2011-04-141-13/+13
| | | | | | (movzx/movsx) because they give more information. Revert that part of the patch. llvm-svn: 129498
* Have the X86 back-end emit the alias instead of what's being aliased. In mostBill Wendling2011-04-142-11/+14
| | | | | | cases, it's much nicer and more informative reading the alias. llvm-svn: 129497
* Add an option to not print the alias of an instruction. It defaults to "printBill Wendling2011-04-131-2/+4
| | | | | | the alias". llvm-svn: 129485
* Reapply r129401 with patch for clang.Bill Wendling2011-04-132-31/+0
| | | | llvm-svn: 129419
* Revert r129401 for now. Clang is using the old way of doing things.Bill Wendling2011-04-122-0/+31
| | | | llvm-svn: 129403
* Remove the unaligned load intrinsics in favor of using native unaligned loads.Bill Wendling2011-04-122-31/+0
| | | | | | | | | Now that we have a first-class way to represent unaligned loads, the unaligned load intrinsics are superfluous. First part of <rdar://problem/8460511>. llvm-svn: 129401
* Don't include Operator.h from InstrTypes.h.Jay Foad2011-04-111-0/+1
| | | | llvm-svn: 129271
* fix rdar://8735979 - "int 3" doesn't match to "int3". Unfortunately,Chris Lattner2011-04-092-0/+19
| | | | | | | InstAlias doesn't allow matching immediate operands, so we have to write C++ code to do this. llvm-svn: 129223
* Replace the old algorithm that emitted the "print the alias for an instruction"Bill Wendling2011-04-074-5/+22
| | | | | | | | | | | | | with the newer, cleaner model. It uses the IAPrinter class to hold the information that is needed to match an instruction with its alias. This also takes into account the available features of the platform. There is one bit of ugliness. The way the logic determines if a pattern is unique is O(N**2), which is gross. But in reality, the number of items it's checking against isn't large. So while it's N**2, it shouldn't be a massive time sink. llvm-svn: 129110
* Add another case we are not optimizing.Rafael Espindola2011-04-061-0/+30
| | | | llvm-svn: 129012
* The original issue has been fixed by not doing unnecessary sign extensions.Rafael Espindola2011-04-061-14/+17
| | | | | | Change the test to force a sign extension and expose the problem again. llvm-svn: 129011
* Make OpcodeMask an unsigned long long literal to deal with overflow.Joerg Sonnenberger2011-04-041-1/+1
| | | | llvm-svn: 128847
* Add support for the VIA PadLock instructions.Joerg Sonnenberger2011-04-047-4/+81
| | | | llvm-svn: 128826
* Expand Op0Mask by one bit in preparation for the PadLock prefixes.Joerg Sonnenberger2011-04-043-50/+51
| | | | | | | | Define most shift masks incrementally to reduce the redundant hard-coding. Introduce new shift for the VEX flags to replace the magic constant 32 in various places. llvm-svn: 128822
* Don't try to create zero-sized stack objects.Evan Cheng2011-03-301-2/+3
| | | | llvm-svn: 128586
* Make helper static.Benjamin Kramer2011-03-261-2/+2
| | | | llvm-svn: 128338
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