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* [ms-inline asm] Have the target AsmParser create the asmrewrite for the offsetofChad Rosier2012-10-261-1/+4
| | | | | | operator. llvm-svn: 166779
* [ms-inline asm] Perform field lookups with the dot operator.Chad Rosier2012-10-251-4/+19
| | | | llvm-svn: 166724
* [ms-inline asm] Add support for creating AsmRewrites in the target specificChad Rosier2012-10-251-3/+6
| | | | | | AsmParser logic. To be used/tested in a subsequent commit. llvm-svn: 166714
* [ms-inline asm] Add error handling to the ParseIntelDotOperator() function.Chad Rosier2012-10-251-16/+35
| | | | llvm-svn: 166698
* Atom has SIMD instruction set extension up to SSSE3Michael Liao2012-10-251-1/+1
| | | | llvm-svn: 166665
* Clean up where SlotSize should be used instead of pointer size.Michael Liao2012-10-252-19/+17
| | | | llvm-svn: 166664
* [ms-inline asm] Add support for parsing the '.' operator. Given,Chad Rosier2012-10-241-0/+34
| | | | | | | | | | | | [register].field The operator returns the value at the location pointed to by register plus the offset of field within its structure or union. This patch only handles immediate fields (i.e., [eax].4). The original displacement has to be a MCConstantExpr as well. Part of rdar://12470415 and rdar://12470514 llvm-svn: 166632
* Tidy up. No functional change intended.Chad Rosier2012-10-241-14/+15
| | | | llvm-svn: 166630
* Implement a basic VectorTargetTransformInfo interface to be used by the loop ↵Nadav Rotem2012-10-241-2/+2
| | | | | | and bb vectorizers for modeling the cost of instructions. llvm-svn: 166593
* [ms-inline asm] Create a register operand, rather than a memory operand when weChad Rosier2012-10-241-40/+45
| | | | | | | | | | see the offsetof operator. Previously, we were matching something like MOVrm in the front-end and later matching MOVrr in the back-end. This change makes things more consistent. It also fixes cases where we can't match against a memory operand as the source (test cases coming). Part of rdar://12470317 llvm-svn: 166592
* Add in support for getIntPtrType to get the pointer type based on the ↵Micah Villmow2012-10-242-5/+8
| | | | | | | | | address space. This checkin also adds in some tests that utilize these paths and updates some of the clients. llvm-svn: 166578
* Special calling conventions for Intel OpenCL built-in library.Elena Demikhovsky2012-10-242-0/+78
| | | | llvm-svn: 166566
* Add custom conversion from v2u32 to v2f32 in 32-bit modeMichael Liao2012-10-242-0/+24
| | | | | | | - As there's no 64-bit GPRs in 32-bit mode, a custom conversion from v2u32 to v2f32 is added to improve the efficiency of the code generated. llvm-svn: 166545
* Change x86_fastcallcc to require inreg markers. This allows it to knownRafael Espindola2012-10-241-1/+1
| | | | | | | | | the difference from "int x" (which should go in registers and "struct y {int x;}" (which should not). Clang will be updated in the next patches. llvm-svn: 166536
* [ms-inline asm] Offset operator - the size should be based on the size of aChad Rosier2012-10-231-0/+4
| | | | | | | pointer, not the size of the variable. Part of rdar://12470317 llvm-svn: 166526
* [ms-inline asm] Clean up comment.Chad Rosier2012-10-231-3/+3
| | | | llvm-svn: 166525
* [ms-inline asm] When parsing inline assembly we set the base register to aChad Rosier2012-10-231-2/+9
| | | | | | | | non-zero value as we don't know the actual value at this point. This is necessary to get the matching correct in some cases. However, the actual value set as the base register doesn't matter, since we're just matching not emitting. llvm-svn: 166523
* Make branch heavy code for generating marked up disassembly simplerKevin Enderby2012-10-231-30/+16
| | | | | | | and easier to read by adding a couple helper functions. Suggestion by Chandler Carruth and seconded by Meador Inge! llvm-svn: 166515
* Fix PR14161Michael Liao2012-10-231-1/+4
| | | | | | | - Check index being extracted to be constant 0 before simplfiying. Otherwise, retain the original sequence. llvm-svn: 166504
* Silence -Wsign-compareMatt Beaumont-Gay2012-10-231-1/+1
| | | | llvm-svn: 166494
* [ms-inline asm] Add an implementation of the offset operator. This is a followChad Rosier2012-10-231-12/+20
| | | | | | | on patch to r166433. rdar://12470317 llvm-svn: 166488
* Add custom UINT_TO_FP from v4i8/v4i16/v8i8/v8i16 to v4f32/v8f32Michael Liao2012-10-232-19/+52
| | | | | | | | - Replace v4i8/v8i8 -> v8f32 DAG combine with custom lowering to reduce DAG combine overhead. - Extend the support to v4i16/v8i16 as well. llvm-svn: 166487
* Enable lowering ZERO_EXTEND/ANY_EXTEND to PMOVZX from SSE4.1Michael Liao2012-10-234-0/+186
| | | | llvm-svn: 166486
* Add support for annotated disassembly output for X86 and arm.Kevin Enderby2012-10-221-2/+30
| | | | | | | | | | | Per the October 12, 2012 Proposal for annotated disassembly output sent out by Jim Grosbach this set of changes implements this for X86 and arm. The llvm-mc tool now has a -mdis option to produced the marked up disassembly and a couple of small example test cases have been added. rdar://11764962 llvm-svn: 166445
* [ms-inline asm] Add the isOffsetOf() function.Chad Rosier2012-10-221-0/+5
| | | | | | Part of rdar://12470317 llvm-svn: 166436
* [ms-inline asm] Add support for parsing the offset operator. Callback for Chad Rosier2012-10-221-5/+21
| | | | | | | CodeGen in the front-end not implemented yet. rdar://12470317 llvm-svn: 166433
* [ms-inline asm] Reset the opcode prior to parsing a statement.Chad Rosier2012-10-191-3/+0
| | | | llvm-svn: 166349
* [ms-inline asm] Have the TargetParser callback to Sema to determine the size ofChad Rosier2012-10-191-3/+30
| | | | | | | a memory operand. Retain this information and then add the sizing directives to the IR. This allows the backend to do proper instruction selection. llvm-svn: 166316
* This patch is to fix radar://8426430. It is about llvm support of ↵Shuxin Yang2012-10-191-0/+1
| | | | | | | | | | | | | | | | | | | | | | | __builtin_debugtrap() which is supposed to consistently raise SIGTRAP across all systems. In contrast, __builtin_trap() behave differently on different systems. e.g. it raises SIGTRAP on ARM, and SIGILL on X86. The purpose of __builtin_debugtrap() is to consistently provide "trap" functionality, in the mean time preserve the compatibility with on gcc on __builtin_trap(). The X86 backend is already able to handle debugtrap(). This patch is to: 1) make front-end recognize "__builtin_debugtrap()" (emboddied in the one-line change to Clang). 2) In DAG legalization phase, by default, "debugtrap" will be replaced with "trap", which make the __builtin_debugtrap() "available" to all existing ports without the hassle of changing their code. 3) If trap-function is specified (via -trap-func=xyz to llc), both __builtin_debugtrap() and __builtin_trap() will be expanded into the function call of the specified trap function. This behavior may need change in the future. The provided testing-case is to make sure 2) and 3) are working for ARM port, and we already have a testing case for x86. llvm-svn: 166300
* Lower BUILD_VECTOR to SHUFFLE + INSERT_VECTOR_ELT for X86Michael Liao2012-10-192-1/+81
| | | | | | | | | - If INSERT_VECTOR_ELT is supported (above SSE2, either by custom sequence of legal insn), transform BUILD_VECTOR into SHUFFLE + INSERT_VECTOR_ELT if most of elements could be built from SHUFFLE with few (so far 1) elements being inserted. llvm-svn: 166288
* Reapply the TargerTransformInfo changes, minus the changes to LSR and ↵Nadav Rotem2012-10-182-2/+21
| | | | | | Lowerinvoke. llvm-svn: 166248
* Temporarily revert the TargetTransform changes.Bob Wilson2012-10-182-21/+2
| | | | | | | | | | | The TargetTransform changes are breaking LTO bootstraps of clang. I am working with Nadav to figure out the problem, but I am reverting it for now to get our buildbots working. This reverts svn commits: 165665 165669 165670 165786 165787 165997 and I have also reverted clang svn 165741 llvm-svn: 166168
* Check for empty YMM use-def lists in X86VZeroUpper.Jakob Stoklund Olesen2012-10-171-1/+1
| | | | | | | | | | | The previous MRI.isPhysRegUsed(YMM0) would also return true when the function contains a call to a function that may clobber YMM0. That's most of them. Checking the use-def chains allows us to skip functions that don't explicitly mention YMM registers. llvm-svn: 166110
* Check SSSE3 instead of SSE4.1Michael Liao2012-10-171-2/+2
| | | | | | - All shuffle insns required, especially PSHUB, are added in SSSE3. llvm-svn: 166086
* Fix setjmp on models with non-Small code model nor non-Static relocation modelMichael Liao2012-10-172-22/+50
| | | | | | | | | | - MBB address is only valid as an immediate value in Small & Static code/relocation models. On other models, LEA is needed to load IP address of the restore MBB. - A minor fix of MBB in MC lowering is added as well to enable target relocation flag being propagated into MC. llvm-svn: 166084
* Support v8f32 to v8i8/vi816 conversion through custom loweringMichael Liao2012-10-162-17/+39
| | | | | | | | - Add custom FP_TO_SINT on v8i16 (and v8i8 which is legalized as v8i16 due to vector element-wise widening) to reduce DAG combiner and its overhead added in X86 backend. llvm-svn: 166036
* Reapply r165661, Patch by Shuxin Yang <shuxin.llvm@gmail.com>.NAKAMURA Takumi2012-10-161-0/+41
| | | | | | | | | | | | | | | | | | | | | | | Original message: The attached is the fix to radar://11663049. The optimization can be outlined by following rules: (select (x != c), e, c) -> select (x != c), e, x), (select (x == c), c, e) -> select (x == c), x, e) where the <c> is an integer constant. The reason for this change is that : on x86, conditional-move-from-constant needs two instructions; however, conditional-move-from-register need only one instruction. While the LowerSELECT() sounds to be the most convenient place for this optimization, it turns out to be a bad place. The reason is that by replacing the constant <c> with a symbolic value, it obscure some instruction-combining opportunities which would otherwise be very easy to spot. For that reason, I have to postpone the change to last instruction-combining phase. The change passes the test of "make check-all -C <build-root/test" and "make -C project/test-suite/SingleSource". Original message since r165661: My previous change has a bug: I negated the condition code of a CMOV, and go ahead creating a new CMOV using the *ORIGINAL* condition code. llvm-svn: 166017
* Move X86MCInstLower class definition into implementation file. It's not ↵Craig Topper2012-10-163-54/+25
| | | | | | needed outside. llvm-svn: 166014
* Add __builtin_setjmp/_longjmp supprt in X86 backendMichael Liao2012-10-157-1/+260
| | | | | | | | | | | - Besides used in SjLj exception handling, __builtin_setjmp/__longjmp is also used as a light-weight replacement of setjmp/longjmp which are used to implementation continuation, user-level threading, and etc. The support added in this patch ONLY addresses this usage and is NOT intended to support SjLj exception handling as zero-cost DWARF exception handling is used by default in X86. llvm-svn: 165989
* [ms-inline asm] If we parsed a statement and the opcode is valid, then it's ↵Chad Rosier2012-10-151-0/+3
| | | | | | an instruction. llvm-svn: 165955
* [ms-inline asm] Update the end loc for ParseIntelMemOperand.Chad Rosier2012-10-151-0/+1
| | | | llvm-svn: 165947
* Resubmit the changes to llvm core to update the functions to support ↵Micah Villmow2012-10-153-9/+9
| | | | | | different pointer sizes on a per address space basis. llvm-svn: 165941
* X86: Disable long nops for all cpus prior to pentiumpro/i686.Benjamin Kramer2012-10-131-1/+3
| | | | llvm-svn: 165878
* X86: Fix accidentally swapped operands.Benjamin Kramer2012-10-131-1/+1
| | | | llvm-svn: 165871
* X86: Promote i8 cmov when both operands are coming from truncates of the ↵Benjamin Kramer2012-10-131-0/+15
| | | | | | | | | | | | | | same width. X86 doesn't have i8 cmovs so isel would emit a branch. Emitting branches at this level is often not a good idea because it's too late for many optimizations to kick in. This solution doesn't add any extensions (truncs are free) and tries to avoid introducing partial register stalls by filtering direct copyfromregs. I'm seeing a ~10% speedup on reading a random .png file with libpng15 via graphicsmagick on x86_64/westmere, but YMMV depending on the microarchitecture. llvm-svn: 165868
* [ms-inline asm] Remove the MatchInstruction() function. Previously, this wasChad Rosier2012-10-131-24/+10
| | | | | | | | | | | the interface between the front-end and the MC layer when parsing inline assembly. Unfortunately, this is too deep into the parsing stack. Specifically, we're unable to handle target-independent assembly (i.e., assembly directives, labels, etc.). Note the MatchAndEmitInstruction() isn't the correct abstraction either. I'll be exposing target-independent hooks shortly, so this is really just a cleanup. llvm-svn: 165858
* [ms-inline asm] Capitalize per coding standard.Chad Rosier2012-10-121-19/+19
| | | | llvm-svn: 165847
* [ms-inline asm] Use the new API introduced in r165830 in lieu of theChad Rosier2012-10-121-25/+14
| | | | | | MapAndConstraints vector. Also remove the unused Kind argument. llvm-svn: 165833
* Revert 165732 for further review.Micah Villmow2012-10-113-9/+9
| | | | llvm-svn: 165747
* Add in the first iteration of support for llvm/clang/lldb to allow variable ↵Micah Villmow2012-10-113-9/+9
| | | | | | per address space pointer sizes to be optimized correctly. llvm-svn: 165726
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