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path: root/llvm/lib/Target/X86/X86TargetTransformInfo.cpp
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* [CostModel][X86] Add CTLZ scalar costsSimon Pilgrim2019-10-141-1/+22
* [CostModel][X86] Add CTPOP scalar costs (PR43656)Simon Pilgrim2019-10-141-0/+23
* [NFC][TTI] Add Alignment for isLegalMasked[Load/Store]Sam Parker2019-10-141-5/+6
* [CostModel][X86] Improve sum reduction costs.Simon Pilgrim2019-10-121-22/+23
* recommit: [LoopVectorize][PowerPC] Estimate int and float register pressure s...Zi Xuan Wu2019-10-121-1/+2
* Revert "[LoopVectorize][PowerPC] Estimate int and float register pressure sep...Jinsong Ji2019-10-081-2/+1
* [LoopVectorize][PowerPC] Estimate int and float register pressure separately ...Zi Xuan Wu2019-10-081-1/+2
* [X86] Enable inline memcmp() to use AVX512David Zarzycki2019-10-041-2/+1
* [X86] Remove -x86-experimental-vector-widening-legalization command line flagCraig Topper2019-09-291-71/+15
* [Alignment][NFC] Remove unneeded llvm:: scoping on Align typesGuillaume Chatelet2019-09-271-2/+2
* [CostModel][X86] Fix SLM <2 x i64> icmp costsSimon Pilgrim2019-09-261-0/+9
* [Cost][X86] Add more missing vector truncation costsSimon Pilgrim2019-09-221-0/+6
* [Cost][X86] Add v2i64 truncation costsSimon Pilgrim2019-09-221-0/+4
* [LLVM][Alignment] Convert isLegalNTStore/isLegalNTLoad to llvm::AlignGuillaume Chatelet2019-09-051-2/+2
* [X86] Simplify the setOperationAction handling for fp_to_uint by improving th...Craig Topper2019-09-031-0/+4
* [X86] Lower the cost of v2i32->v2f64 sint_to_fp under vector widening legaliz...Craig Topper2019-08-221-0/+18
* [X86] Add back the -x86-experimental-vector-widening-legalization comand line...Craig Topper2019-08-201-13/+52
* [X86] Improve cost model for subvector extraction of less than 128-bit vectorsCraig Topper2019-08-151-0/+33
* [X86][CostModel] Adjust the costs of ZERO_EXTEND/SIGN_EXTEND with less than 1...Craig Topper2019-08-141-10/+12
* Recommit r367901 "[X86] Enable -x86-experimental-vector-widening-legalization...Craig Topper2019-08-071-9/+45
* Revert "[X86] Enable -x86-experimental-vector-widening-legalization by default."Mitch Phillips2019-08-061-45/+9
* [X86] Enable -x86-experimental-vector-widening-legalization by default.Craig Topper2019-08-051-9/+45
* [ExpandMemCmp] Honor prefer-vector-width.Clement Courbet2019-06-261-2/+3
* [ExpandMemCmp] Move all options to TargetTransformInfo.Clement Courbet2019-06-251-25/+16
* [LV] Suppress vectorization in some nontemporal casesWarren Ristow2019-06-171-0/+35
* [CostModel][X86] Improve masked load/store AVX1/AVX2 costsSimon Pilgrim2019-06-021-2/+2
* [TTI][X86] Cleanup getMaskedMemoryOpCost. NFCI.Simon Pilgrim2019-06-021-8/+11
* [CostModel][X86] Add min/max reduction costs for all SSE targetsSimon Pilgrim2019-05-111-6/+90
* [TTI][X86] Make getAddressComputationCost cost value const. NFCI.Simon Pilgrim2019-05-051-1/+1
* [CostModel][X86] Add bool anyof/allof reduction costsSimon Pilgrim2019-04-171-0/+42
* [CostModel][X86] Masked load legalization requires an binary-shuffle not a se...Simon Pilgrim2019-04-071-2/+2
* [X86MacroFusion] Handle branch fusion (AMD CPUs).Clement Courbet2019-03-281-1/+1
* [ScalarizeMaskedMemIntrin] Add support for scalarizing expandload and compres...Craig Topper2019-03-211-0/+28
* [X86] Improve the type checking in isLegalMaskedLoad and isLegalMaskedGather.Craig Topper2019-03-081-11/+31
* Temporarily Revert "[X86][SLP] Enable SLP vectorization for 128-bit horizonta...Eric Christopher2019-02-201-7/+0
* [X86] Don't consider functions ABI compatible for ArgumentPromotion pass if t...Craig Topper2019-02-191-0/+16
* [X86] Filter out tuning feature flags and a few ISA feature flags when checki...Craig Topper2019-02-191-4/+3
* [X86][SLP] Enable SLP vectorization for 128-bit horizontal X86 instructions (...Anton Afanasyev2019-02-131-0/+7
* [CodeGen][X86] Expand UADDSAT to NOT+UMIN+ADDNikita Popov2019-01-281-0/+7
* [TTI] Add generic SADDO/SSUBO costsSimon Pilgrim2019-01-241-0/+10
* [TTI] Add generic UADDO/USUBO costsSimon Pilgrim2019-01-241-3/+14
* [CostModel][X86] Add ICMP Predicate specific costsSimon Pilgrim2019-01-221-8/+49
* [CostModel][X86] Add explicit vector select costsSimon Pilgrim2019-01-201-0/+41
* [CostModel][X86] Add explicit fcmp costs for pre-SSE42 targetsSimon Pilgrim2019-01-201-0/+11
* [TTI][X86] Reordered getCmpSelInstrCost cost tables in descending ISA order. ...Simon Pilgrim2019-01-201-24/+24
* Update the file headers across all of the LLVM projects in the monorepoChandler Carruth2019-01-191-4/+3
* Reapply "[CodeGen][X86] Expand USUBSAT to UMAX+SUB, also for vectors"Nikita Popov2019-01-151-0/+7
* Revert "[CodeGen][X86] Expand USUBSAT to UMAX+SUB, also for vectors"Nikita Popov2019-01-141-7/+0
* [CodeGen][X86] Expand USUBSAT to UMAX+SUB, also for vectorsNikita Popov2019-01-141-0/+7
* [x86] explicitly set cost of integer add/subSanjay Patel2019-01-061-0/+8
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