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* Unweaken vtables as per ↵David Blaikie2011-12-201-0/+2
| | | | | | http://llvm.org/docs/CodingStandards.html#ll_virtual_anch llvm-svn: 146960
* Move global variables in TargetMachine into new TargetOptions class. As an APINick Lewycky2011-12-021-6/+12
| | | | | | | | | | | | change, now you need a TargetOptions object to create a TargetMachine. Clang patch to follow. One small functionality change in PTX. PTX had commented out the machine verifier parts in their copy of printAndVerify. That now calls the version in LLVMTargetMachine. Users of PTX who need verification disabled should rely on not passing the command-line flag to enable it. llvm-svn: 145714
* Turn on vzeroupper insertion on call boundaries for AVX; it works as far as ↵Eli Friedman2011-11-171-1/+1
| | | | | | I know, and I'd like to see wider testing. llvm-svn: 144867
* Sink codegen optimization level into MCCodeGenInfo along side relocation modelEvan Cheng2011-11-161-16/+14
| | | | | | | and code model. This eliminates the need to pass OptLevel flag all over the place and makes it possible for any codegen pass to use this information. llvm-svn: 144788
* Remove code to enable execution dependency fix pass on VR256. VR128 is ↵Craig Topper2011-11-161-9/+3
| | | | | | sufficient after r144636. llvm-svn: 144777
* Properly qualify AVX2 specific parts of execution dependency table. Also ↵Craig Topper2011-11-151-4/+1
| | | | | | enable converting between 256-bit PS/PD operations when AVX1 is enabled. Fixes PR11370. llvm-svn: 144622
* Enable execution dependency fix pass for YMM registers when AVX2 is enabled. ↵Craig Topper2011-11-091-4/+12
| | | | | | Add AVX2 logical operations to list of replaceable instructions. llvm-svn: 144179
* Revert "Turn on the vzeroupper pass by default."Eric Christopher2011-10-181-1/+1
| | | | | | This reverts commit 494f7ac3e8d2ab3d94e52317abf9c42a949fe1f3. llvm-svn: 142455
* Turn on the vzeroupper pass by default.Eric Christopher2011-10-181-1/+1
| | | | | | I'll remove/rename the option in a few days. llvm-svn: 142439
* A few 80-col violations.Evan Cheng2011-10-141-4/+8
| | | | llvm-svn: 141988
* Fixed natural stack alignment for Linux x86-32. Thanks Eli.Lang Hames2011-10-111-1/+1
| | | | llvm-svn: 141616
* Add a natural stack alignment field to TargetData, and prevent InstCombine fromLang Hames2011-10-101-4/+4
| | | | | | | | | | | | | | promoting allocas to preferred alignments that exceed the natural alignment. This avoids some potentially expensive dynamic stack realignments. The natural stack alignment is set in target data strings via the "S<size>" option. Size is in bits and must be a multiple of 8. The natural stack alignment defaults to "unspecified" (represented by a zero value), and the "unspecified" value does not prevent any alignment promotions. Target maintainers that care about avoiding promotions should explicitly add the "S<size>" option to their target data strings. llvm-svn: 141599
* Remove X86-dependent stuff from SSEDomainFix.Jakob Stoklund Olesen2011-09-271-1/+1
| | | | | | | | | This also enables domain swizzling for AVX code which required a few trivial test changes. The pass will be moved to lib/CodeGen shortly. llvm-svn: 140659
* Enable SSEDomainFix pass for AVX mode.Bruno Cardoso Lopes2011-09-151-4/+7
| | | | llvm-svn: 139816
* Use internal storage for command line option.Benjamin Kramer2011-09-031-5/+3
| | | | llvm-svn: 139079
* Move TargetRegistry and TargetSelect from Target to Support where they belong.Evan Cheng2011-08-241-1/+1
| | | | | | These are strictly utilities for registering targets and components. llvm-svn: 138450
* Introduce a pass to insert vzeroupper instructions to avoid AVX toBruno Cardoso Lopes2011-08-231-0/+16
| | | | | | | | | | SSE transition penalty. The pass is enabled through the "x86-use-vzeroupper" llc command line option. This is only the first step (very naive and conservative one) to sketch out the idea, but proper DFA is coming next to allow smarter decisions. Comments and ideas now and in further commits will be very appreciated. llvm-svn: 138317
* More refactoring.Evan Cheng2011-07-251-37/+0
| | | | llvm-svn: 135939
* - Move CodeModel from a TargetMachine global option to MCCodeGenInfo.Evan Cheng2011-07-201-26/+7
| | | | | | | | - Introduce JITDefault code model. This tells targets to set different default code model for JIT. This eliminates the ugly hack in TargetMachine where code model is changed after construction. llvm-svn: 135580
* Introduce MCCodeGenInfo, which keeps information that can affect codegenEvan Cheng2011-07-191-64/+12
| | | | | | | (including compilation, assembly). Move relocation model Reloc::Model from TargetMachine to MCCodeGenInfo so it's accessible even without TargetMachine. llvm-svn: 135468
* Rename createAsmInfo to createMCAsmInfo and move registration code to ↵Evan Cheng2011-07-141-21/+0
| | | | | | MCTargetDesc to prepare for next round of changes. llvm-svn: 135219
* - Eliminate MCCodeEmitter's dependency on TargetMachine. It now uses MCInstrInfoEvan Cheng2011-07-111-2/+2
| | | | | | | | | | | | and MCSubtargetInfo. - Added methods to update subtarget features (used when targets automatically detect subtarget features or switch modes). - Teach X86Subtarget to update MCSubtargetInfo features bits since the MCSubtargetInfo layer can be shared with other modules. - These fixes .code 16 / .code 32 support since mode switch is updated in MCSubtargetInfo so MC code emitter can do the right thing. llvm-svn: 134884
* Restore old behavior. Always auto-detect features unless cpu or features are ↵Evan Cheng2011-07-081-1/+1
| | | | | | specified. llvm-svn: 134757
* Eliminate asm parser's dependency on TargetMachine:Evan Cheng2011-07-081-1/+1
| | | | | | | | | | - Each target asm parser now creates its own MCSubtatgetInfo (if needed). - Changed AssemblerPredicate to take subtarget features which tablegen uses to generate asm matcher subtarget feature queries. e.g. "ModeThumb,FeatureThumb2" is translated to "(Bits & ModeThumb) != 0 && (Bits & FeatureThumb2) != 0". llvm-svn: 134678
* Add Mode64Bit feature and sink it down to MC layer.Evan Cheng2011-07-071-1/+1
| | | | llvm-svn: 134641
* Fix the ridiculous SubtargetFeatures API where it implicitly expects CPU name toEvan Cheng2011-06-301-3/+6
| | | | | | | | | | be the first encoded as the first feature. It then uses the CPU name to look up features / scheduling itineray even though clients know full well the CPU name being used to query these properties. The fix is to just have the clients explictly pass the CPU name! llvm-svn: 134127
* Rename TargetOptions::StackAlignment to StackAlignmentOverride.Evan Cheng2011-06-231-1/+1
| | | | llvm-svn: 133739
* Remove TargetOptions.h dependency from X86Subtarget.Evan Cheng2011-06-231-1/+5
| | | | llvm-svn: 133726
* Add a getExprForPersonalitySymbol method to MCAsmInfo. Use it whenRafael Espindola2011-04-281-2/+6
| | | | | | converting the symbol passed to .cfi_personality into bytes is the file. llvm-svn: 130400
* ADT/Triple: Move a variety of clients to using isOSDarwin() and isOSWindows()Daniel Dunbar2011-04-191-24/+14
| | | | | | predicates. llvm-svn: 129816
* Add datalayout information for the IEEE quad precision fp128 type.Duncan Sands2011-03-011-4/+4
| | | | llvm-svn: 126780
* Triple::MinGW64 is deprecated and removed. We can use Triple::MinGW32 generally.NAKAMURA Takumi2011-02-171-2/+0
| | | | | | No one uses *-mingw64. mingw-w64 is represented as {i686|x86_64}-w64-mingw32. In llvm side, i686 and x64 can be treated as similar way. llvm-svn: 125747
* Fix whitespace.NAKAMURA Takumi2011-02-171-4/+4
| | | | llvm-svn: 125746
* Patches to build EFI with Clang/LLVM. By Carl Norum.Evan Cheng2011-02-011-2/+8
| | | | llvm-svn: 124639
* Add support for the --noexecstack option.Rafael Espindola2011-01-231-2/+3
| | | | llvm-svn: 124077
* Rename TargetFrameInfo into TargetFrameLowering. Also, put couple of FIXMEs ↵Anton Korobeynikov2011-01-101-1/+1
| | | | | | and fixes here and there. llvm-svn: 123170
* Move getInitialFrameState() to TargetFrameInfoAnton Korobeynikov2010-11-181-2/+2
| | | | llvm-svn: 119754
* First step of huge frame-related refactoring: move emit{Prologue,Epilogue} ↵Anton Korobeynikov2010-11-151-4/+1
| | | | | | out of TargetRegisterInfo to TargetFrameInfo, which is definitely much better suitable place llvm-svn: 119097
* Recommit 116056, now with the missing file...Cameron Esfahani2010-10-081-1/+2
| | | | llvm-svn: 116083
* va_args support for Win64.Anton Korobeynikov2010-10-031-2/+1
| | | | | | Patch by Cameron! llvm-svn: 115480
* Jim Asked us to move DataLayout on ARM back to the most specialized classes. DoRafael Espindola2010-10-031-5/+18
| | | | | | | | so and also change X86 for consistency. Investigating if this can be improved a bit. llvm-svn: 115469
* Use rip-rel addressing on win64 by default. For this we justAnton Korobeynikov2010-08-211-14/+18
| | | | | | defaults to small pic code model. llvm-svn: 111741
* Hookup ELF support for X86.Matt Fleming2010-08-161-2/+1
| | | | llvm-svn: 111173
* Print an error message when someone tries -integrated-as on an unsupported ↵Benjamin Kramer2010-08-041-1/+7
| | | | | | | | | | target. - The COFF backend doesn't support MingW/Cygwin at the moment, it'll report an error, but it's still much better than random assertions from the MachO backend. - We want to make ELF the default eventually, it's what the majority of targets use. llvm-svn: 110197
* Add relax all support to the COFF object streamer.Michael J. Spencer2010-07-311-1/+1
| | | | llvm-svn: 109947
* Make MC use Windows COFF on Windows and add tests.Michael J. Spencer2010-07-271-0/+2
| | | | llvm-svn: 109494
* Remove the X86::FP_REG_KILL pseudo-instruction and the X86FloatingPointRegKillJakob Stoklund Olesen2010-07-161-8/+0
| | | | | | | | | pass that inserted it. It is no longer necessary to limit the live ranges of FP registers to a single basic block. llvm-svn: 108536
* Allow x87 FP registers to be alive globally in a function.Jakob Stoklund Olesen2010-07-161-1/+6
| | | | | | | | | | | | | | | | FP_REG_KILL instructions are still inserted, but can be disabled by passing -live-x87 to llc. The X87FPRegKillInserterPass is going to be removed shortly. CFG edges are partioned into bundles where the x87 stack must be allocated identically. Code is insertad at the end of each basic block that shuffles the live FP registers to match the outgoing bundles expectations. This fix is in preparation for some upcoming register allocator improvements that may extend the live range of registers beyond a basic block, similar to LICM. It also provides a nice runtime speedup if you are building with -mfpmath=387. llvm-svn: 108529
* Reapply bottom-up fast-isel, with several fixes for x86-32:Dan Gohman2010-07-101-0/+4
| | | | | | | | | - Check getBytesToPopOnReturn(). - Eschew ST0 and ST1 for return values. - Fix the PIC base register initialization so that it doesn't ever fail to end up the top of the entry block. llvm-svn: 108039
* Reapply r107655 with fixes; insert the pseudo instruction intoDan Gohman2010-07-061-3/+3
| | | | | | | the block before calling the expansion hook. And don't put EFLAGS in a mbb's live-in list twice. llvm-svn: 107691
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