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* X86JITInfo::getLazyResolverFunction() should not read cpu id to determine ↵Evan Cheng2009-09-031-3/+4
| | | | | | | | whether sse is available. Just use consult subtarget. No functionality changes. llvm-svn: 80880
* Add support for modeling whether or not the processor has support forChris Lattner2009-09-021-0/+4
| | | | | | | conditional moves as a subtarget feature. This is the easy part of PR4841. llvm-svn: 80763
* change the -x86-asm-syntax=intel/att flag to be in X86TAI Chris Lattner2009-08-111-17/+0
| | | | | | | instead of X86 Subtarget. This elimianates dependencies on X86Subtarget from X86TAI. llvm-svn: 78746
* Normalize Subtarget constructors to take a target triple string instead ofDaniel Dunbar2009-08-021-4/+3
| | | | | | | | | | Module*. Also, dropped uses of TargetMachine where unnecessary. The only target which still takes a TargetMachine& is Mips, I would appreciate it if someone would normalize this to match other targets. llvm-svn: 77918
* remove the now-dead TM argument to these methods.Chris Lattner2009-07-101-2/+2
| | | | llvm-svn: 75276
* make PIC vs DynamicNoPIC be explicit in PICStyles.Chris Lattner2009-07-101-7/+15
| | | | llvm-svn: 75275
* add a couple of predicates to test for "stub style pic in PIC mode" and ↵Chris Lattner2009-07-101-2/+6
| | | | | | "stub style pic in dynamic-no-pic" mode. llvm-svn: 75273
* simplify fast isel by using ClassifyGlobalReference. ThisChris Lattner2009-07-101-6/+0
| | | | | | elimiantes the last use of GVRequiresExtraLoad, so delete it. llvm-svn: 75244
* eliminate GVRequiresRegister, replacing it with predicates we Chris Lattner2009-07-101-5/+0
| | | | | | need for other purposes. llvm-svn: 75243
* move some classification logic around. Now GVRequiresExtraLoadChris Lattner2009-07-101-14/+17
| | | | | | | is just a trivial wrapper around "ClassifyGlobalReference", which stole a ton of logic from LowerGlobalAddress. llvm-svn: 75237
* GVRequiresExtraLoad is now never used for calls, simplify it based on this.Chris Lattner2009-07-101-2/+1
| | | | llvm-svn: 75232
* actually, just eliminate PCRelGVRequiresExtraLoad. It makes the codeChris Lattner2009-07-101-6/+0
| | | | | | more complex and slow than just directly testing what we care about. llvm-svn: 75231
* There is only one case where GVRequiresExtraLoad returns true for calls:Chris Lattner2009-07-101-1/+7
| | | | | | | split its handling out to PCRelGVRequiresExtraLoad, and simplify code based on this. llvm-svn: 75230
* the "isDirectCall" operand of GVRequiresRegister is always false, eliminate it.Chris Lattner2009-07-101-3/+2
| | | | llvm-svn: 75229
* When in -static mode, force the PIC style to none. Doing this requires fixingChris Lattner2009-07-091-2/+6
| | | | | | | code which conflated RIPRel PIC with x86-64. Fix these to just check for X86-64 directly. llvm-svn: 75092
* Fix a subtarget feature bug.David Greene2009-06-291-1/+1
| | | | llvm-svn: 74428
* Add feature flags for AVX and FMA and fix some SSE4A feature flagDavid Greene2009-06-261-3/+15
| | | | | | initialization problems. llvm-svn: 74350
* cosmetic changes.Chris Lattner2009-06-211-1/+1
| | | | llvm-svn: 73836
* Update CPU capabilities for AMD machinesStefanus Du Toit2009-05-261-0/+4
| | | | | | | | | | | | | | | | | - added processors k8-sse3, opteron-sse3, athlon64-sse3, amdfam10, and barcelona with appropriate sse3/4a levels - added FeatureSSE4A for amdfam10 processors in X86Subtarget: - added hasSSE4A - updated AutoDetectSubtargetFeatures to detect SSE4A - updated GetCurrentX86CPU to detect family 15 with sse3 as k8-sse3 and family 10h as amdfam10 New processor names match those used by gcc. Patch by Paul Redmond! llvm-svn: 72434
* Propagate CPU string out of SubtargetFeaturesAnton Korobeynikov2009-05-231-1/+2
| | | | llvm-svn: 72335
* Try again. Allow call to immediate address for ELF or when in static ↵Evan Cheng2009-05-201-0/+4
| | | | | | relocation mode. llvm-svn: 72160
* Tidy up #includes, deleting a bunch of unnecessary #includes.Dan Gohman2009-01-051-1/+0
| | | | llvm-svn: 61715
* Do not isel load folding bt instructions for pentium m, core, core2, and AMD ↵Evan Cheng2009-01-021-0/+5
| | | | | | processors. These are significantly slower than a load followed by a bt of a register. llvm-svn: 61557
* Add initial support for back-scheduling address computations,Dan Gohman2008-12-161-0/+6
| | | | | | | especially in the case of addresses computed from loop induction variables. llvm-svn: 61075
* Forgot a file.Dale Johannesen2008-12-051-0/+6
| | | | llvm-svn: 60609
* Fix build with gcc-4.4: it doesn't like PICStyleDuncan Sands2008-11-281-9/+9
| | | | | | being both a namespace and a variable name. llvm-svn: 60208
* Just don't transform this memset into "bzero" if no-builtin is specified.Bill Wendling2008-09-301-1/+1
| | | | llvm-svn: 56888
* Add the new `-no-builtin' flag. This flag is meant to mimic the GCCBill Wendling2008-09-301-1/+1
| | | | | | | | | `-fno-builtin' flag. Currently, it's used to replace "memset" with "_bzero" instead of "__bzero" on Darwin10+. This arguably violates the meaning of this flag, but is currently sufficient. The meaning of this flag should become more specific over time. llvm-svn: 56885
* Use a dedicated IsLinux flag instead of an ELFLinux TargetType.Dan Gohman2008-05-051-6/+9
| | | | llvm-svn: 50649
* Add AsmPrinter support for emitting a directive to declare thatDan Gohman2008-05-051-2/+7
| | | | | | | | | the code being generated does not require an executable stack. Also, add target-specific code to make use of this on Linux on x86. llvm-svn: 50634
* Re-enable SSE4.Evan Cheng2008-04-031-3/+2
| | | | llvm-svn: 49158
* Temporarily disabling SSE4 until we fix the encoding issues.Evan Cheng2008-04-031-2/+3
| | | | llvm-svn: 49129
* Speculatively micro-optimize memory-zeroing calls on Darwin 10.Dan Gohman2008-04-011-0/+6
| | | | llvm-svn: 49048
* Add convenient helper for win64 check. Simplify things slightly.Anton Korobeynikov2008-03-221-0/+3
| | | | llvm-svn: 48691
* Update comment.Evan Cheng2008-02-121-2/+2
| | | | llvm-svn: 47002
* Fix a x86-64 codegen deficiency. Allow gv + offset when using rip addressing ↵Evan Cheng2008-02-071-8/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | mode. Before: _main: subq $8, %rsp leaq _X(%rip), %rax movsd 8(%rax), %xmm1 movss _X(%rip), %xmm0 call _t xorl %ecx, %ecx movl %ecx, %eax addq $8, %rsp ret Now: _main: subq $8, %rsp movsd _X+8(%rip), %xmm1 movss _X(%rip), %xmm0 call _t xorl %ecx, %ecx movl %ecx, %eax addq $8, %rsp ret Notice there is another idiotic codegen issue that needs to be fixed asap: xorl %ecx, %ecx movl %ecx, %eax llvm-svn: 46850
* SSE 4.1 Intrinsics and detectionNate Begeman2008-02-031-1/+3
| | | | llvm-svn: 46681
* darwin9 and above support aligned common symbols.Chris Lattner2008-01-021-1/+8
| | | | llvm-svn: 45494
* Remove attribution from file headers, per discussion on llvmdev.Chris Lattner2007-12-291-2/+2
| | | | llvm-svn: 45418
* Make ARM an X86 memcpy expansion more similar to each other.Rafael Espindola2007-10-311-7/+5
| | | | | | | | Now both subtarget define getMaxInlineSizeThreshold and the expansion uses it. This should not change generated code. llvm-svn: 43552
* Add support for having different alignment for objects on call frames.Rafael Espindola2007-09-071-1/+1
| | | | | | | The x86-64 ABI states that objects passed on the stack have 8 byte alignment. Implement that. llvm-svn: 41768
* Mac OS X X86-64 ABI is same as the standard.Evan Cheng2007-09-041-6/+2
| | | | llvm-svn: 41700
* Align i64 and f64 at 8 byte on x86-64.Rafael Espindola2007-08-311-6/+12
| | | | | | | This is mandated table 3.1 at http://www.x86-64.org/documentation/abi.pdf llvm-svn: 41642
* Replace 4-line function with 10-line version per review comment.Dale Johannesen2007-08-061-4/+10
| | | | llvm-svn: 40881
* Move lengthy conditional down 1 level per review comment.Dale Johannesen2007-08-061-0/+5
| | | | llvm-svn: 40878
* Mac OS X X86-64 low 4G address not available.Evan Cheng2007-08-011-0/+14
| | | | llvm-svn: 40701
* Add support for our first SSSE3 instruction "pmulhrsw".Bill Wendling2007-04-101-2/+3
| | | | llvm-svn: 35869
* document some subtletyChris Lattner2007-01-161-1/+3
| | | | llvm-svn: 33257
* Instead of yet another enum indicating the "assembly language flavor",Bill Wendling2007-01-161-0/+4
| | | | | | just use the one that's in the subtarget. llvm-svn: 33255
* * PIC codegen for X86/Linux has been implementedAnton Korobeynikov2007-01-121-4/+21
| | | | | | | | * PIC-aware internal structures in X86 Codegen have been refactored * Visibility (default/weak) has been added * Docs fixes (external weak linkage, visibility, formatting) llvm-svn: 33136
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