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* Add support for generating CMPXCHG16B on x86-64 for the cmpxchg IR instruction.Eli Friedman2011-08-261-0/+2
| | | | llvm-svn: 138660
* Next round of MC refactoring. This patch factor MC table instantiations, MCEvan Cheng2011-07-141-2/+0
| | | | | | registeration and creation code into XXXMCDesc libraries. llvm-svn: 135184
* - Eliminate MCCodeEmitter's dependency on TargetMachine. It now uses MCInstrInfoEvan Cheng2011-07-111-24/+46
| | | | | | | | | | | | and MCSubtargetInfo. - Added methods to update subtarget features (used when targets automatically detect subtarget features or switch modes). - Teach X86Subtarget to update MCSubtargetInfo features bits since the MCSubtargetInfo layer can be shared with other modules. - These fixes .code 16 / .code 32 support since mode switch is updated in MCSubtargetInfo so MC code emitter can do the right thing. llvm-svn: 134884
* Really force on 64bit for 64-bit targets. Should fix remaining failures on ↵Eli Friedman2011-07-081-3/+11
| | | | | | unknown x86/non-x86 targets. llvm-svn: 134773
* Revert earlier unnecessary hack. Make sure we correctly force on 64bit and ↵Eli Friedman2011-07-081-3/+8
| | | | | | cmov for 64-bit targets. llvm-svn: 134768
* Restore old behavior. Always auto-detect features unless cpu or features are ↵Evan Cheng2011-07-081-18/+5
| | | | | | specified. llvm-svn: 134757
* Default 64-bit target features and SSE2 on when a triple specifies x86-64. ↵Eli Friedman2011-07-081-10/+0
| | | | | | Clean up all the other hacks which are now unnecessary. llvm-svn: 134753
* For non-x86 host, used generic as CPU name.Evan Cheng2011-07-081-5/+10
| | | | llvm-svn: 134741
* Eliminate asm parser's dependency on TargetMachine:Evan Cheng2011-07-081-1/+2
| | | | | | | | | | - Each target asm parser now creates its own MCSubtatgetInfo (if needed). - Changed AssemblerPredicate to take subtarget features which tablegen uses to generate asm matcher subtarget feature queries. e.g. "ModeThumb,FeatureThumb2" is translated to "(Bits & ModeThumb) != 0 && (Bits & FeatureThumb2) != 0". llvm-svn: 134678
* Add Mode64Bit feature and sink it down to MC layer.Evan Cheng2011-07-071-83/+32
| | | | llvm-svn: 134641
* Compute feature bits at time of MCSubtargetInfo initialization.Evan Cheng2011-07-071-2/+2
| | | | llvm-svn: 134606
* Rename XXXGenSubtarget.inc to XXXGenSubtargetInfo.inc for consistency.Evan Cheng2011-07-011-1/+1
| | | | llvm-svn: 134281
* Rename TargetSubtarget to TargetSubtargetInfo for consistency.Evan Cheng2011-07-011-1/+1
| | | | llvm-svn: 134259
* - Added MCSubtargetInfo to capture subtarget features and schedulingEvan Cheng2011-07-011-2/+8
| | | | | | | | | itineraries. - Refactor TargetSubtarget to be based on MCSubtargetInfo. - Change tablegen generated subtarget info to initialize MCSubtargetInfo and hide more details from targets. llvm-svn: 134257
* Fix the ridiculous SubtargetFeatures API where it implicitly expects CPU name toEvan Cheng2011-06-301-4/+7
| | | | | | | | | | be the first encoded as the first feature. It then uses the CPU name to look up features / scheduling itineray even though clients know full well the CPU name being used to query these properties. The fix is to just have the clients explictly pass the CPU name! llvm-svn: 134127
* Remove TargetOptions.h dependency from X86Subtarget.Evan Cheng2011-06-231-34/+5
| | | | llvm-svn: 133726
* Enable autodetect of popcntMon P Wang2011-05-171-0/+1
| | | | llvm-svn: 131476
* ADT/Triple: Renambe isOSX... methods to isMacOSX for consistency with the OSDaniel Dunbar2011-04-201-1/+2
| | | | | | triple component. llvm-svn: 129838
* Target/X86: Eliminate uses of getDarwinVers().Daniel Dunbar2011-04-191-1/+1
| | | | llvm-svn: 129813
* Stack alignment is 16 bytes on FreeBSD/i386 too.Roman Divacky2011-02-221-3/+4
| | | | llvm-svn: 126226
* The stack should be 16 byte aligned on 32 bit solaris. Patch by Yuri.Duncan Sands2011-02-211-3/+3
| | | | llvm-svn: 126130
* Experiment with changing the default 32-bit linux stack alignment toEric Christopher2011-01-131-3/+3
| | | | | | 16 bytes for PR8969. Update all testcases accordingly. llvm-svn: 123367
* Disable auto-detection of AVX support since AVX codegen support is not ready.Evan Cheng2010-12-131-1/+2
| | | | llvm-svn: 121677
* Formalize the notion that AVX and SSE are non-overlapping extensions from ↵Nate Begeman2010-12-101-2/+4
| | | | | | the compiler's point of view. Per email discussion, we either want to always use VEX-prefixed instructions or never use them, and are taking "HasAVX" to mean "Always use VEX". Passing -mattr=-avx,+sse42 should serve to restore legacy SSE support when desirable. llvm-svn: 121439
* Initialize HasPOPCNT.Bill Wendling2010-12-041-1/+2
| | | | llvm-svn: 120923
* Merge System into Support.Michael J. Spencer2010-11-291-1/+1
| | | | llvm-svn: 120298
* Use rip-rel addressing on win64 by default. For this we justAnton Korobeynikov2010-08-211-1/+1
| | | | | | defaults to small pic code model. llvm-svn: 111741
* Add x86 CLMUL (Carry-less multiplication) cpu featureBruno Cardoso Lopes2010-07-231-3/+5
| | | | llvm-svn: 109206
* Have the X86 backend use Triple instead of a string and some enums.Eric Christopher2010-07-051-34/+3
| | | | llvm-svn: 107625
* fix a nasty bug where we were not treating available_externallyChris Lattner2010-06-141-3/+6
| | | | | | | | | | | symbols as declarations in the X86 backend. This would manifest on darwin x86-32 as errors like this with -fvisibility=hidden: symbol '__ZNSbIcED1Ev' can not be undefined in a subtraction expression This fixes PR7353. llvm-svn: 105954
* FastISel doesn't yet handle callee-pop functions.Dan Gohman2010-05-271-0/+23
| | | | | | To support this, move IsCalleePop from X86ISelLowering to X86Subtarget. llvm-svn: 104866
* Enable i16 to i32 promotion by default.Evan Cheng2010-04-281-6/+0
| | | | llvm-svn: 102493
* isel (i32 anyext i16) as insert_subreg when 16-bit ops are being promoted.Evan Cheng2010-04-211-0/+6
| | | | llvm-svn: 101979
* Separate out the AES-NI instructions from the SSE4.2 instructions. AddEric Christopher2010-04-021-0/+2
| | | | | | | | | a new subtarget option for AES and check for the support. Add "westmere" line of processors and add AES-NI support to the core i7. Add a couple of TODOs for information I couldn't verify. llvm-svn: 100231
* Nehalem unaligned memory access is fast.Evan Cheng2010-04-011-0/+4
| | | | llvm-svn: 100089
* Turning off post-ra scheduling for x86. It isn't a consistent win.Evan Cheng2010-03-181-9/+0
| | | | llvm-svn: 98810
* no really, all 64-bit cpu's have cmov support. This shouldChris Lattner2010-03-141-1/+6
| | | | | | fix the rest of the buildbot failures on non-x86 hosts. llvm-svn: 98522
* Kill ModuleProvider and ghost linkage by inverting the relationship betweenJeffrey Yasskin2010-01-271-2/+2
| | | | | | | | | | | | | | | | | | | | | Modules and ModuleProviders. Because the "ModuleProvider" simply materializes GlobalValues now, and doesn't provide modules, it's renamed to "GVMaterializer". Code that used to need a ModuleProvider to materialize Functions can now materialize the Functions directly. Functions no longer use a magic linkage to record that they're materializable; they simply ask the GVMaterializer. Because the C ABI must never change, we can't remove LLVMModuleProviderRef or the functions that refer to it. Instead, because Module now exposes the same functionality ModuleProvider used to, we store a Module* in any LLVMModuleProviderRef and translate in the wrapper methods. The bindings to other languages still use the ModuleProvider concept. It would probably be worth some time to update them to follow the C++ more closely, but I don't intend to do it. Fixes http://llvm.org/PR5737 and http://llvm.org/PR5735. llvm-svn: 94686
* Implement a feature (-vector-unaligned-mem) to allow targets toDavid Greene2010-01-111-0/+1
| | | | | | | | ignore alignment requirements for SIMD memory operands. This is useful on architectures like the AMD 10h that do not trap on unaligned references if a status bit is twiddled at startup time. llvm-svn: 93151
* Change errs() to dbgs().David Greene2010-01-051-1/+1
| | | | llvm-svn: 92648
* Remove target attribute break-sse-dep. Instead, do not fold load into sse ↵Evan Cheng2009-12-221-2/+0
| | | | | | partial update instructions unless optimizing for size. llvm-svn: 91910
* On recent Intel u-arch's, folding loads into some unary SSE instructions canEvan Cheng2009-12-181-0/+2
| | | | | | | | | | | | | | | | | | | be non-optimal. To be precise, we should avoid folding loads if the instructions only update part of the destination register, and the non-updated part is not needed. e.g. cvtss2sd, sqrtss. Unfolding the load from these instructions breaks the partial register dependency and it can improve performance. e.g. movss (%rdi), %xmm0 cvtss2sd %xmm0, %xmm0 instead of cvtss2sd (%rdi), %xmm0 An alternative method to break dependency is to clear the register first. e.g. xorps %xmm0, %xmm0 cvtss2sd (%rdi), %xmm0 llvm-svn: 91672
* Don't enable the post-RA scheduler on x86 except at -O3. In itsDan Gohman2009-12-071-1/+1
| | | | | | current form, it is too expensive in compile time. llvm-svn: 90781
* Target-independent support for TargetFlags on BlockAddress operands,Dan Gohman2009-11-201-0/+15
| | | | | | and support for blockaddresses in x86-32 PIC mode. llvm-svn: 89506
* Add llvm::sys::getHostCPUName, for detecting the LLVM name for the host CPU.Daniel Dunbar2009-11-141-113/+2
| | | | | | | | | - This is an initial step towards -march=native support in Clang, and towards eliminating host dependencies in the targets. See PR5389. - Patch by Roman Divacky! llvm-svn: 88768
* Allow target to specify regclass for which antideps will only be broken ↵David Goodwin2009-11-131-2/+2
| | | | | | along the critical path. llvm-svn: 88682
* Fixed to address code review. No functional changes.David Goodwin2009-11-101-0/+10
| | | | llvm-svn: 86634
* Remove X86Subtarget::IsLinux. It's no longer being used.Evan Cheng2009-10-151-2/+0
| | | | llvm-svn: 84200
* Reference to hidden symbols do not have to go through non-lazy pointer in ↵Evan Cheng2009-09-031-8/+1
| | | | | | non-pic mode. rdar://7187172. llvm-svn: 80904
* Make these functions static and local.Daniel Dunbar2009-09-031-5/+4
| | | | llvm-svn: 80892
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