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* FastISel doesn't yet handle callee-pop functions.Dan Gohman2010-05-271-0/+23
| | | | | | To support this, move IsCalleePop from X86ISelLowering to X86Subtarget. llvm-svn: 104866
* Enable i16 to i32 promotion by default.Evan Cheng2010-04-281-6/+0
| | | | llvm-svn: 102493
* isel (i32 anyext i16) as insert_subreg when 16-bit ops are being promoted.Evan Cheng2010-04-211-0/+6
| | | | llvm-svn: 101979
* Separate out the AES-NI instructions from the SSE4.2 instructions. AddEric Christopher2010-04-021-0/+2
| | | | | | | | | a new subtarget option for AES and check for the support. Add "westmere" line of processors and add AES-NI support to the core i7. Add a couple of TODOs for information I couldn't verify. llvm-svn: 100231
* Nehalem unaligned memory access is fast.Evan Cheng2010-04-011-0/+4
| | | | llvm-svn: 100089
* Turning off post-ra scheduling for x86. It isn't a consistent win.Evan Cheng2010-03-181-9/+0
| | | | llvm-svn: 98810
* no really, all 64-bit cpu's have cmov support. This shouldChris Lattner2010-03-141-1/+6
| | | | | | fix the rest of the buildbot failures on non-x86 hosts. llvm-svn: 98522
* Kill ModuleProvider and ghost linkage by inverting the relationship betweenJeffrey Yasskin2010-01-271-2/+2
| | | | | | | | | | | | | | | | | | | | | Modules and ModuleProviders. Because the "ModuleProvider" simply materializes GlobalValues now, and doesn't provide modules, it's renamed to "GVMaterializer". Code that used to need a ModuleProvider to materialize Functions can now materialize the Functions directly. Functions no longer use a magic linkage to record that they're materializable; they simply ask the GVMaterializer. Because the C ABI must never change, we can't remove LLVMModuleProviderRef or the functions that refer to it. Instead, because Module now exposes the same functionality ModuleProvider used to, we store a Module* in any LLVMModuleProviderRef and translate in the wrapper methods. The bindings to other languages still use the ModuleProvider concept. It would probably be worth some time to update them to follow the C++ more closely, but I don't intend to do it. Fixes http://llvm.org/PR5737 and http://llvm.org/PR5735. llvm-svn: 94686
* Implement a feature (-vector-unaligned-mem) to allow targets toDavid Greene2010-01-111-0/+1
| | | | | | | | ignore alignment requirements for SIMD memory operands. This is useful on architectures like the AMD 10h that do not trap on unaligned references if a status bit is twiddled at startup time. llvm-svn: 93151
* Change errs() to dbgs().David Greene2010-01-051-1/+1
| | | | llvm-svn: 92648
* Remove target attribute break-sse-dep. Instead, do not fold load into sse ↵Evan Cheng2009-12-221-2/+0
| | | | | | partial update instructions unless optimizing for size. llvm-svn: 91910
* On recent Intel u-arch's, folding loads into some unary SSE instructions canEvan Cheng2009-12-181-0/+2
| | | | | | | | | | | | | | | | | | | be non-optimal. To be precise, we should avoid folding loads if the instructions only update part of the destination register, and the non-updated part is not needed. e.g. cvtss2sd, sqrtss. Unfolding the load from these instructions breaks the partial register dependency and it can improve performance. e.g. movss (%rdi), %xmm0 cvtss2sd %xmm0, %xmm0 instead of cvtss2sd (%rdi), %xmm0 An alternative method to break dependency is to clear the register first. e.g. xorps %xmm0, %xmm0 cvtss2sd (%rdi), %xmm0 llvm-svn: 91672
* Don't enable the post-RA scheduler on x86 except at -O3. In itsDan Gohman2009-12-071-1/+1
| | | | | | current form, it is too expensive in compile time. llvm-svn: 90781
* Target-independent support for TargetFlags on BlockAddress operands,Dan Gohman2009-11-201-0/+15
| | | | | | and support for blockaddresses in x86-32 PIC mode. llvm-svn: 89506
* Add llvm::sys::getHostCPUName, for detecting the LLVM name for the host CPU.Daniel Dunbar2009-11-141-113/+2
| | | | | | | | | - This is an initial step towards -march=native support in Clang, and towards eliminating host dependencies in the targets. See PR5389. - Patch by Roman Divacky! llvm-svn: 88768
* Allow target to specify regclass for which antideps will only be broken ↵David Goodwin2009-11-131-2/+2
| | | | | | along the critical path. llvm-svn: 88682
* Fixed to address code review. No functional changes.David Goodwin2009-11-101-0/+10
| | | | llvm-svn: 86634
* Remove X86Subtarget::IsLinux. It's no longer being used.Evan Cheng2009-10-151-2/+0
| | | | llvm-svn: 84200
* Reference to hidden symbols do not have to go through non-lazy pointer in ↵Evan Cheng2009-09-031-8/+1
| | | | | | non-pic mode. rdar://7187172. llvm-svn: 80904
* Make these functions static and local.Daniel Dunbar2009-09-031-5/+4
| | | | llvm-svn: 80892
* X86JITInfo::getLazyResolverFunction() should not read cpu id to determine ↵Evan Cheng2009-09-031-9/+10
| | | | | | | | whether sse is available. Just use consult subtarget. No functionality changes. llvm-svn: 80880
* Add support for modeling whether or not the processor has support forChris Lattner2009-09-021-6/+8
| | | | | | | conditional moves as a subtarget feature. This is the easy part of PR4841. llvm-svn: 80763
* Short-term workaround for frame-related weirdness on win64.Anton Korobeynikov2009-08-281-1/+1
| | | | | | | | Some other minor win64 fixes as well. Patch by Michael Beck! llvm-svn: 80370
* change the -x86-asm-syntax=intel/att flag to be in X86TAI Chris Lattner2009-08-111-18/+1
| | | | | | | instead of X86 Subtarget. This elimianates dependencies on X86Subtarget from X86TAI. llvm-svn: 78746
* Remove some dead code.Daniel Dunbar2009-08-051-22/+1
| | | | llvm-svn: 78219
* - s/DOUT/DEBUG(errs()/gBill Wendling2009-08-031-4/+5
| | | | | | - Tidy up some headers. llvm-svn: 77929
* Normalize Subtarget constructors to take a target triple string instead ofDaniel Dunbar2009-08-021-3/+3
| | | | | | | | | | Module*. Also, dropped uses of TargetMachine where unnecessary. The only target which still takes a TargetMachine& is Mips, I would appreciate it if someone would normalize this to match other targets. llvm-svn: 77918
* Fix some minor MSVC compiler warnings.Daniel Dunbar2009-07-191-6/+2
| | | | llvm-svn: 76356
* GV with ghost linkage (module being lazily streamed in in JIT lazy ↵Evan Cheng2009-07-161-5/+9
| | | | | | compilation mode) do not require extra load from stub. This fixes ExecutionEngine/2005-12-02-TailCallBug.ll. llvm-svn: 76121
* fix indentationChris Lattner2009-07-101-14/+14
| | | | llvm-svn: 75277
* remove the now-dead TM argument to these methods.Chris Lattner2009-07-101-2/+2
| | | | llvm-svn: 75276
* make PIC vs DynamicNoPIC be explicit in PICStyles.Chris Lattner2009-07-101-12/+0
| | | | llvm-svn: 75275
* some minor simplifications.Chris Lattner2009-07-101-13/+31
| | | | llvm-svn: 75274
* add a couple of predicates to test for "stub style pic in PIC mode" and ↵Chris Lattner2009-07-101-1/+12
| | | | | | "stub style pic in dynamic-no-pic" mode. llvm-svn: 75273
* simplify fast isel by using ClassifyGlobalReference. ThisChris Lattner2009-07-101-9/+0
| | | | | | elimiantes the last use of GVRequiresExtraLoad, so delete it. llvm-svn: 75244
* eliminate GVRequiresRegister, replacing it with predicates we Chris Lattner2009-07-101-14/+0
| | | | | | need for other purposes. llvm-svn: 75243
* move some classification logic around. Now GVRequiresExtraLoadChris Lattner2009-07-101-25/+78
| | | | | | | is just a trivial wrapper around "ClassifyGlobalReference", which stole a ton of logic from LowerGlobalAddress. llvm-svn: 75237
* GVRequiresExtraLoad is now never used for calls, simplify it based on this.Chris Lattner2009-07-101-8/+3
| | | | llvm-svn: 75232
* actually, just eliminate PCRelGVRequiresExtraLoad. It makes the codeChris Lattner2009-07-101-13/+0
| | | | | | more complex and slow than just directly testing what we care about. llvm-svn: 75231
* There is only one case where GVRequiresExtraLoad returns true for calls:Chris Lattner2009-07-101-2/+15
| | | | | | | split its handling out to PCRelGVRequiresExtraLoad, and simplify code based on this. llvm-svn: 75230
* the "isDirectCall" operand of GVRequiresRegister is always false, eliminate it.Chris Lattner2009-07-101-5/+4
| | | | llvm-svn: 75229
* simplify some code based on the fact that picstyles != none are only valid Chris Lattner2009-07-091-2/+1
| | | | | | in pic or dynamic-no-pic mode. Also, x86-64 never used picstylegot. llvm-svn: 75101
* Reduce indentation in GVRequiresExtraLoad. Return true for windowsChris Lattner2009-07-091-26/+28
| | | | | | with DLLImport symbols even when in -static mode. llvm-svn: 75093
* Add feature flags for AVX and FMA and fix some SSE4A feature flagDavid Greene2009-06-261-0/+9
| | | | | | initialization problems. llvm-svn: 74350
* The attached patches implement most of the ARM AAPCS-VFP hard floatAnton Korobeynikov2009-06-081-0/+4
| | | | | | | | | ABI. The missing piece is support for putting "homogeneous aggregates" into registers. Patch by Sandeep Patel! llvm-svn: 73095
* Update CPU capabilities for AMD machinesStefanus Du Toit2009-05-261-3/+15
| | | | | | | | | | | | | | | | | - added processors k8-sse3, opteron-sse3, athlon64-sse3, amdfam10, and barcelona with appropriate sse3/4a levels - added FeatureSSE4A for amdfam10 processors in X86Subtarget: - added hasSSE4A - updated AutoDetectSubtargetFeatures to detect SSE4A - updated GetCurrentX86CPU to detect family 15 with sse3 as k8-sse3 and family 10h as amdfam10 New processor names match those used by gcc. Patch by Paul Redmond! llvm-svn: 72434
* Try again. Allow call to immediate address for ELF or when in static ↵Evan Cheng2009-05-201-2/+10
| | | | | | relocation mode. llvm-svn: 72160
* add support for detecting process features on win64, patch byChris Lattner2009-04-251-36/+50
| | | | | | Nicolas Capens! llvm-svn: 70057
* Introduce new linkage types linkonce_odr, weak_odr, common_odrDuncan Sands2009-03-071-1/+1
| | | | | | | | | | | | | | | | | | | | | and extern_weak_odr. These are the same as the non-odr versions, except that they indicate that the global will only be overridden by an *equivalent* global. In C, a function with weak linkage can be overridden by a function which behaves completely differently. This means that IP passes have to skip weak functions, since any deductions made from the function definition might be wrong, since the definition could be replaced by something completely different at link time. This is not allowed in C++, thanks to the ODR (One-Definition-Rule): if a function is replaced by another at link-time, then the new function must be the same as the original function. If a language knows that a function or other global can only be overridden by an equivalent global, it can give it the weak_odr linkage type, and the optimizers will understand that it is alright to make deductions based on the function body. The code generators on the other hand map weak and weak_odr linkage to the same thing. llvm-svn: 66339
* Added another darwin subtargetMon P Wang2009-02-281-0/+4
| | | | llvm-svn: 65662
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