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* AVX-512: Added FMA instructions, intrinsics an tests for KNL and SKX targetsElena Demikhovsky2014-12-231-1/+25
| | | | | | | | by Asaf Badouh http://reviews.llvm.org/D6456 llvm-svn: 224764
* AVX-512: Added all forms of BLENDM instructions,Elena Demikhovsky2014-12-221-1/+19
| | | | | | intrinsics, encoding tests for AVX-512F and skx instructions. llvm-svn: 224707
* AVX-512: Added EXPAND instructions and intrinsics.Elena Demikhovsky2014-12-151-14/+62
| | | | llvm-svn: 224241
* [AVX512] Add support for 512b variable bit shift intrinsics.Cameron McInally2014-12-111-0/+6
| | | | llvm-svn: 224028
* AVX-512: Added all forms of COMPRESS instructionElena Demikhovsky2014-12-111-3/+53
| | | | | | + intrinsics + tests llvm-svn: 224019
* X86 intrinsics moved form X86ISelLowering.cpp to X86IntrinsicsInfo.hElena Demikhovsky2014-12-081-1/+48
| | | | | | | | X86ISelLowering.cpp has a long switch for intrinsics. I moved a part of this long switch to the new intrinsics table in X86IntrinsicsInfo.h. No functional changes, just code and compile time optimization. llvm-svn: 223641
* [X86] Refactor PMOV[SZ]Xrm to add missing AVX2 patterns.Ahmed Bougacha2014-12-061-0/+24
| | | | | | | | Most patterns will go away once the extload legalization changes land. Differential Revision: http://reviews.llvm.org/D6125 llvm-svn: 223567
* [X86] Clean up whitespace as well as minor coding styleMichael Liao2014-12-041-7/+7
| | | | llvm-svn: 223339
* AVX-512: Scalar ERI intrinsicsElena Demikhovsky2014-11-261-1/+5
| | | | | | | | | | | | including SAE mode and memory operand. Added AVX512_maskable_scalar template, that should cover all scalar instructions in the future. The main difference between AVX512_maskable_scalar<> and AVX512_maskable<> is using X86select instead of vselect. I need it, because I can't create vselect node for MVT::i1 mask for scalar instruction. http://reviews.llvm.org/D6378 llvm-svn: 222820
* [AVX512] Add 512b integer shift by variable intrinsics and patterns.Cameron McInally2014-11-251-1/+7
| | | | llvm-svn: 222786
* [AVX512] Add integer shift by immediate intrinsics.Cameron McInally2014-11-121-1/+8
| | | | llvm-svn: 221811
* AVX-512: Intrinsics for ERIElena Demikhovsky2014-11-121-1/+7
| | | | | | | | | 3 instructions: vrcp28, vrsqrt28, vexp2, only vector forms. Intrinsics include SAE (Suppres All Exceptions) parameter. http://reviews.llvm.org/D6214 llvm-svn: 221774
* [AVX512] Added intrinsics for 128-, 256- and 512-bit versions of ↵Robert Khasanov2014-10-081-1/+25
| | | | | | | | | | | VPCMP/VPCMPU{BWDQ} Added CMP_MASK_CC intrinsic type. Added tests for intrinsics. Patch by Sergey Lisitsyn <sergey.lisitsyn@intel.com> llvm-svn: 219316
* [AVX512] Added intrinsics for 128-, 256- and 512-bit versions of VCMPGT{BWDQ}.Robert Khasanov2014-09-301-0/+12
| | | | | | Patch by Sergey Lisitsyn <sergey.lisitsyn@intel.com> llvm-svn: 218670
* [AVX512] Added intrinsics for 128- and 256-bit versions of VCMPEQ{BWDQ}Robert Khasanov2014-09-301-0/+8
| | | | | | | | | | | | | | Fixed lowering of this intrinsics in case when mask is v2i1 and v4i1. Now cmp intrinsics lower in the following way: (i8 (int_x86_avx512_mask_pcmpeq_q_128 (v2i64 %a), (v2i64 %b), (i8 %mask))) -> (i8 (bitcast (v8i1 (insert_subvector undef, (v2i1 (and (PCMPEQM %a, %b), (extract_subvector (v8i1 (bitcast %mask)), 0))), 0)))) llvm-svn: 218669
* [AVX512] Added intrinsics for VPCMPEQB and VPCMPEQW.Robert Khasanov2014-09-301-0/+2
| | | | | | Added new operand type for intrinsics (IIT_V64) llvm-svn: 218668
* [AVX512] Enabled intrinsics for VPCMPEQD and VPCMPEQQ.Robert Khasanov2014-09-301-2/+4
| | | | | | Added CMP_MASK intrinsic type llvm-svn: 218667
* Fixed compilation problem on Windows (initialization of non-aggregate type).Elena Demikhovsky2014-09-041-6/+2
| | | | | | After commit 217131. llvm-svn: 217134
* X86 Intrinsics table - changed to a static table sorted by intrinsic id.Elena Demikhovsky2014-09-041-201/+223
| | | | | | Used binary search over the tables. llvm-svn: 217131
* X86 intrinsics table - simplifies intrinsics lowering.Elena Demikhovsky2014-08-241-0/+241
| | | | | | The tables are initialized when X86TargetLowering object is created. llvm-svn: 216345
* Reverted last commitElena Demikhovsky2014-08-171-235/+0
| | | | llvm-svn: 215827
* Added a table for intrinsics on X86. Elena Demikhovsky2014-08-171-0/+235
It should remove dosens of lines in handling instrinsics (in a huge switch) and give an easy way to add new intrinsics. I did not completed to move al intrnsics to the table, I'll do this in the upcomming commits. llvm-svn: 215826
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