summaryrefslogtreecommitdiffstats
path: root/llvm/lib/Target/X86/X86InstrXOP.td
Commit message (Collapse)AuthorAgeFilesLines
...
* [X86][XOP] Added support for the lowering of 128-bit vector shifts to XOP ↵Simon Pilgrim2015-09-301-13/+40
| | | | | | | | | | | | shift instructions The XOP shifts just have logical/arithmetic versions and the left/right shifts are controlled by whether the value is positive/negative. Because of this I've added new X86ISD nodes instead of trying to force them to use the existing shift nodes. Additionally Excavator cores (bdver4) support XOP and AVX2 - meaning that it should use the AVX2 shifts when it can and fall back to XOP in other cases. Differential Revision: http://reviews.llvm.org/D8690 llvm-svn: 248878
* [X86][XOP] Enable commutation for XOP instructionsSimon Pilgrim2015-02-141-68/+89
| | | | | | | | | | Patch to allow XOP instructions (integer comparison and integer multiply-add) to be commuted. The comparison instructions sometimes require the compare mode to be flipped but the remaining instructions can use default commutation modes. This patch also sets the SSE domains of all the XOP instructions. Differential Revision: http://reviews.llvm.org/D7646 llvm-svn: 229267
* [X86] Add support for parsing and printing the mnemonic aliases for the XOP ↵Craig Topper2015-02-131-17/+30
| | | | | | VPCOM instructions. llvm-svn: 229078
* [X86] Remove the remaining uses of memop from AVX and AVX2 instruction ↵Craig Topper2015-02-081-30/+30
| | | | | | patterns. AVX and AVX2 can handle unaligned loads being folded so we can just use 'load' llvm-svn: 228551
* Merge HasVEXPrefix/HasEVEXPrefix/HasXOPPrefix into a 2-bit 'encoding' field ↵Craig Topper2014-02-021-23/+23
| | | | | | in TSFlags. llvm-svn: 200624
* Add XOP disassembler support. Fixes PR13933.Craig Topper2013-10-031-84/+62
| | | | llvm-svn: 191874
* Add explicit VEX_L tags to all 256-bit instructions. This will allow us to ↵Craig Topper2012-09-191-8/+9
| | | | | | remove code from the code emitters that examined operands to set the L-bit. llvm-svn: 164202
* Fix intrinsics for XOP frczss/sd instructions. These instructions only take ↵Craig Topper2012-06-131-12/+6
| | | | | | one source register and zero the upper bits of the destination rather than preserving them. llvm-svn: 158396
* Add intrinsics for immediate form of XOP vprot instructions. Use i128mem ↵Craig Topper2012-06-101-27/+37
| | | | | | instead of f128mem for integer XOP instructions. llvm-svn: 158291
* Use XOP vpcom intrinsics in patterns instead of a target specific SDNode ↵Craig Topper2012-06-091-14/+13
| | | | | | type. Remove the custom lowering code that selected the SDNode type. llvm-svn: 158279
* some comment fix for X86 and ARMJia Liu2012-02-191-1/+1
| | | | llvm-svn: 150902
* Emacs-tag and some comment fix for all ARM, CellSPU, Hexagon, MBlaze, ↵Jia Liu2012-02-181-3/+3
| | | | | | MSP430, PPC, PTX, Sparc, X86, XCore. llvm-svn: 150878
* Remove most of the intrinsics for XOP VPCMOV instruction. They all aliased ↵Craig Topper2012-02-051-125/+0
| | | | | | to the same instruction with different types. This would be better accomplished with casts in the not yet created xopintrin.h header file. llvm-svn: 149795
* Move some XOP patterns into instruction definition. Replae VPCMOV intrinsic ↵Craig Topper2012-01-301-451/+51
| | | | | | patterns with custom lowering to a target specific nodes. llvm-svn: 149216
* Add HasXOP predicate check covering a bunch of XOP intrinsic patterns.Craig Topper2012-01-261-0/+2
| | | | llvm-svn: 149054
* Add XOP Intrinsics and testsJan Sjödin2012-01-111-73/+662
| | | | llvm-svn: 147949
* Add disassembler support for VPERMIL2PD and VPERMIL2PS.Craig Topper2011-12-301-4/+2
| | | | llvm-svn: 147368
* Separate the concept of having memory access in operand 4 from the concept ↵Craig Topper2011-12-301-4/+4
| | | | | | of having the W bit set for XOP instructons. Removes ORing W-bits in the encoder and will similarly simplify the disassembler implementation. llvm-svn: 147366
* XOP instructions and encoding tests.Jan Sjödin2011-12-121-0/+243
llvm-svn: 146407
OpenPOWER on IntegriCloud