summaryrefslogtreecommitdiffstats
path: root/llvm/lib/Target/X86/X86InstrVecCompiler.td
Commit message (Expand)AuthorAgeFilesLines
* [X86] Use EVEX instructions for f128 FAND/FOR/FXOR when avx512vl is enabled.Craig Topper2019-06-101-1/+22
* [X86] Explcitly disable VEXTRACT instruction matching for an immediate of 0. ...Craig Topper2019-05-221-70/+0
* Recommit r355224 "[TableGen][SelectionDAG][X86] Add specific isel matchers fo...Craig Topper2019-03-101-1/+1
* Revert r355224 "[TableGen][SelectionDAG][X86] Add specific isel matchers for ...Craig Topper2019-03-051-1/+1
* [TableGen][SelectionDAG][X86] Add specific isel matchers for immAllZerosV/imm...Craig Topper2019-03-011-1/+1
* [X86] Add test cases for opportunities to fold a truncate and a masked store ...Craig Topper2019-01-241-1/+1
* Update the file headers across all of the LLVM projects in the monorepoChandler Carruth2019-01-191-4/+3
* [X86] Stop changing f128 fand/for/fxor to v2i64.Craig Topper2018-10-301-2/+19
* [X86] Add some isel patterns for scalar_to_vector/extract_vector_element that...Craig Topper2018-10-271-12/+32
* [X86] Remove all the vector NOP bitcast patterns. Use a few lines of code in ...Craig Topper2018-08-031-117/+0
* [X86] Support fp128 and/or/xor/load/store with VEX and EVEX encoded instructi...Craig Topper2018-08-031-0/+78
* [X86] Merge the FR128 and VR128 regclass since they have identical spill and ...Craig Topper2018-07-161-1/+1
* [X86] Remove i128 type from FR128 regclass.Craig Topper2018-07-121-2/+0
* [X86] Remove patterns for inserting a load into a zero vector.Craig Topper2018-07-111-88/+45
* [X86] Use IsProfitableToFold to block vinsertf128rm in favor of insert_subreg...Craig Topper2018-07-101-1/+0
* [X86] Post process the DAG after isel to remove vector moves that were added ...Craig Topper2018-03-161-61/+0
* [X86] Remove duplicate isel pattern. NFCCraig Topper2018-03-091-1/+0
* [X86] Fix some isel patterns that used aligned vector load instructions with ...Craig Topper2018-03-081-76/+76
* [X86] Don't use EXTRACT_ELEMENT from v1i1 with i8/i32 result type when we nee...Craig Topper2018-02-281-0/+17
* [X86] Various vXi1 insertion improvements.Craig Topper2018-01-231-0/+17
* [X86] Use vmovdqu64/vmovdqa64 for unmasked integer vector stores for consiste...Craig Topper2018-01-181-12/+12
* [X86] Make v2i1 and v4i1 legal types without VLXCraig Topper2018-01-071-13/+12
* [X86] Use KMOV instructions to zero upper bits of vectors when possible.Craig Topper2017-12-091-12/+29
* [X86] Teach lowering to only let through (insert_subvector (vXi1 zeros), subv...Craig Topper2017-12-081-32/+4
* [X86] Always consider inserting a vXi1 vector into the lsbs of a zero vector ...Craig Topper2017-12-081-1/+95
* [X86] If we see an insert of a bitcast into zero vector, canonicalize it to m...Craig Topper2017-10-081-1/+2
* [AVX-512] Replace large number of explicit patterns that check for insert_sub...Craig Topper2017-09-251-0/+81
* [X86] Add isel pattern infrastructure to begin recognizing when we're inserti...Craig Topper2017-09-151-0/+59
* [X86] Move more isel patterns to X86InstrVecCompiler.td. NFCCraig Topper2017-09-061-1/+184
* [X86] Actually add the new file that was supposed to go with r312649.Craig Topper2017-09-061-0/+179
OpenPOWER on IntegriCloud