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path: root/llvm/lib/Target/X86/X86InstrInfo.cpp
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* BlockHasNoFallThrough() now returns true if block ends with a return instruct...Evan Cheng2007-05-211-0/+5
* RemoveBranch() and InsertBranch() now returns number of instructions deleted ...Evan Cheng2007-05-181-9/+12
* Relex assertions to account for additional implicit def / use operands.Evan Cheng2007-04-251-1/+1
* Remove some invalid instructions from this check.Bill Wendling2007-04-241-2/+1
* Adding more MMX instructions.Bill Wendling2007-04-031-1/+3
* Add FEMMS and ADDQ. Renamed MMX recipes to prepend the MMX_ to them.Bill Wendling2007-04-031-5/+5
* Compile CodeGen/X86/lea-3.ll:test2 to:Chris Lattner2007-03-281-0/+13
* Fix a problem building llvm-gcc on amd64-unknown-freebsd6.2, due to theChris Lattner2007-03-281-1/+3
* Two changes:Chris Lattner2007-03-201-9/+36
* Added "padd*" support for MMX. Added MMX move stuff to X86InstrInfo so thatBill Wendling2007-03-081-1/+6
* Make LABEL a builtin opcode.Jim Laskey2007-01-261-8/+0
* convertToThreeAddress() is now responsible for updating live info as well as ...Evan Cheng2006-12-011-8/+16
* Change MachineInstr ctor's to take a TargetInstrDescriptor reference insteadEvan Cheng2006-11-271-15/+15
* Fix a potential bug: MOVPDI2DI, etc. are not copy instructions.Evan Cheng2006-11-161-3/+1
* Properly transfer kill / dead info.Evan Cheng2006-11-151-14/+27
* Matches MachineInstr changes.Evan Cheng2006-11-131-11/+11
* fix wonky indentationChris Lattner2006-10-301-6/+6
* add another target hook for branch folding.Chris Lattner2006-10-281-0/+12
* Implement support for branch condition reversal.Chris Lattner2006-10-211-2/+28
* Simplify code, no functionality changeChris Lattner2006-10-211-4/+2
* allow insertion of a conditional branch with fall-throughChris Lattner2006-10-211-6/+12
* update assert messageChris Lattner2006-10-211-1/+1
* bugfixChris Lattner2006-10-201-1/+1
* Implement branch analysis/xform hooks required by the branch folding pass.Chris Lattner2006-10-201-0/+151
* expose DWARF_LABEL opcode# so the branch folder can update debug info properly.Chris Lattner2006-10-171-0/+7
* remove some dead codeChris Lattner2006-10-131-33/+0
* update commentsChris Lattner2006-09-281-0/+1
* Committing X86-64 support.Evan Cheng2006-09-081-2/+16
* Fix a long-standing wart in the code generator: two-address instruction loweringChris Lattner2006-09-051-1/+1
* Can't commute shufps. The high / low parts elements come from different vectors.Evan Cheng2006-07-251-18/+0
* Commute shufps / shufpd.Evan Cheng2006-05-301-0/+18
* Somehow I lost a condition when I was shuffling some code around. Anyway,Evan Cheng2006-05-301-1/+1
* Fix a build breaker.Evan Cheng2006-05-301-10/+12
* Oops. PSHUFD is only available with SSE2.Evan Cheng2006-05-301-5/+8
* Allow shufps x, x, mask to be converted to pshufd x, mask to save a move.Evan Cheng2006-05-301-1/+12
* These can be transformed into lea as well. Not that we use this featureEvan Cheng2006-05-191-0/+2
* Add MOV16_rm / MOV32_rm and MOV16_mr / MOV32_mr to isLoadFromStackSlot and is...Evan Cheng2006-05-111-0/+4
* Fixing truncate. Previously we were emitting truncate from r16 to r8 asEvan Cheng2006-05-081-0/+1
* Teach the codegen about instructions used for SSE spill code, allowing itChris Lattner2006-04-181-0/+4
* - More efficient extract_vector_elt with shuffle and movss, movsd, movd, etc.Evan Cheng2006-04-031-2/+4
* Support for scalar to vector with zero extension.Evan Cheng2006-03-241-1/+2
* - Remove scalar to vector pseudo ops. They are just wrong.Evan Cheng2006-03-211-1/+2
* 1. Use pxor instead of xoraps / xorapd to clear FR32 / FR64 registers. ThisEvan Cheng2006-02-161-0/+1
* fix operand numbersChris Lattner2006-02-021-4/+4
* Move isLoadFrom/StoreToStackSlot from MRegisterInfo to TargetInstrInfo,a far ...Chris Lattner2006-02-021-0/+48
* Tell codegen MOVAPSrr and MOVAPDrr are copies.Evan Cheng2006-02-011-1/+2
* Properly split f32 and f64 into separate register classes for scalar sse fpNate Begeman2005-10-141-1/+1
* Teach the register allocator that movaps is also a move instructionNate Begeman2005-07-161-1/+1
* First round of support for doing scalar FP using the SSE2 ISA extension andNate Begeman2005-07-061-1/+1
* * Remove trailing whitespaceMisha Brukman2005-04-211-4/+4
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