| Commit message (Collapse) | Author | Age | Files | Lines |
|
|
|
|
|
|
|
|
|
| |
Add header guards to files that were missing guards. Remove #endif comments
as they don't seem common in LLVM (we can easily add them back if we decide
they're useful)
Changes made by clang-tidy with minor tweaks.
llvm-svn: 215558
|
|
|
|
| |
llvm-svn: 207394
|
|
|
|
| |
llvm-svn: 159035
|
|
|
|
| |
llvm-svn: 144631
|
|
|
|
|
|
|
|
| |
sink them into MC layer.
- Added MCInstrInfo, which captures the tablegen generated static data. Chang
TargetInstrInfo so it's based off MCInstrInfo.
llvm-svn: 134021
|
|
|
|
|
|
|
|
| |
"getFixedStack" on the MachinePointerInfo class. While
this isn't the problem I'm setting out to solve, it is the
right way to eliminate PseudoSourceValue, so lets go with it.
llvm-svn: 114406
|
|
|
|
| |
llvm-svn: 114391
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
| |
Since mem2reg isn't run at -O0, we get a ton of reloads from the stack,
for example, before, this code:
int foo(int x, int y, int z) {
return x+y+z;
}
used to compile into:
_foo: ## @foo
subq $12, %rsp
movl %edi, 8(%rsp)
movl %esi, 4(%rsp)
movl %edx, (%rsp)
movl 8(%rsp), %edx
movl 4(%rsp), %esi
addl %edx, %esi
movl (%rsp), %edx
addl %esi, %edx
movl %edx, %eax
addq $12, %rsp
ret
Now we produce:
_foo: ## @foo
subq $12, %rsp
movl %edi, 8(%rsp)
movl %esi, 4(%rsp)
movl %edx, (%rsp)
movl 8(%rsp), %edx
addl 4(%rsp), %edx ## Folded load
addl (%rsp), %edx ## Folded load
movl %edx, %eax
addq $12, %rsp
ret
Fewer instructions and less register use = faster compiles.
llvm-svn: 113102
|
|
|
|
|
|
|
|
|
|
|
| |
like all other instructions, even though a segment is not
allowed. This resolves a bunch of gross hacks in the
encoder and makes LEA more consistent with the rest of the
instruction set.
No functionality change.
llvm-svn: 107934
|
|
|
|
| |
llvm-svn: 101334
|
|
|
|
|
|
|
|
|
|
|
| |
stack slots and giving them different PseudoSourceValue's did not fix the
problem of post-alloc scheduling miscompiling llvm itself.
- Apply Dan's conservative workaround by assuming any non fixed stack slots can
alias other memory locations. This means a load from spill slot #1 cannot
move above a store of spill slot #2.
- Enable post-alloc scheduling for x86 at optimization leverl Default and above.
llvm-svn: 84424
|
|
|
|
|
|
| |
get FixedStack PseudoSourceValues.
llvm-svn: 84326
|
|
|
|
| |
llvm-svn: 84321
|
|
|
|
|
|
| |
necessarily fixed. Only those will negative frame indices are "fixed."
llvm-svn: 84315
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
| |
- Allocate MachineMemOperands and MachineMemOperand lists in MachineFunctions.
This eliminates MachineInstr's std::list member and allows the data to be
created by isel and live for the remainder of codegen, avoiding a lot of
copying and unnecessary translation. This also shrinks MemSDNode.
- Delete MemOperandSDNode. Introduce MachineSDNode which has dedicated
fields for MachineMemOperands.
- Change MemSDNode to have a MachineMemOperand member instead of its own
fields with the same information. This introduces some redundancy, but
it's more consistent with what MachineInstr will eventually want.
- Ignore alignment when searching for redundant loads for CSE, but remember
the greatest alignment.
Target-specific code which previously used MemOperandSDNodes with generic
SDNodes now use MemIntrinsicSDNodes, with opcodes in a designated range
so that the SelectionDAG framework knows that MachineMemOperand information
is available.
llvm-svn: 82794
|
|
|
|
|
|
|
| |
PseudoSourceValue already effectively represents the offset from the
frame base, so the actual offset should not be added to it.
llvm-svn: 82465
|
|
|
|
|
|
|
|
| |
displacement
values to machineinstrs.
llvm-svn: 81886
|
|
|
|
| |
llvm-svn: 75971
|
|
|
|
|
|
| |
pic mode.
llvm-svn: 74582
|
|
|
|
| |
llvm-svn: 74366
|
|
|
|
|
|
|
|
|
|
|
|
| |
booleans. This gives a better indication of what the "addReg()" is
doing. Remembering what all of those booleans mean isn't easy, especially if you
aren't spending all of your time in that code.
I took Jakob's suggestion and made it illegal to pass in "true" for the
flag. This should hopefully prevent any unintended misuse of this (by reverting
to the old way of using addReg()).
llvm-svn: 71722
|
|
|
|
|
|
| |
Tested by bootstrapping llvm-gcc and using that to build llvm.
llvm-svn: 68645
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
| |
builds.
--- Reverse-merging (from foreign repository) r68552 into '.':
U test/CodeGen/X86/tls8.ll
U test/CodeGen/X86/tls10.ll
U test/CodeGen/X86/tls2.ll
U test/CodeGen/X86/tls6.ll
U lib/Target/X86/X86Instr64bit.td
U lib/Target/X86/X86InstrSSE.td
U lib/Target/X86/X86InstrInfo.td
U lib/Target/X86/X86RegisterInfo.cpp
U lib/Target/X86/X86ISelLowering.cpp
U lib/Target/X86/X86CodeEmitter.cpp
U lib/Target/X86/X86FastISel.cpp
U lib/Target/X86/X86InstrInfo.h
U lib/Target/X86/X86ISelDAGToDAG.cpp
U lib/Target/X86/AsmPrinter/X86ATTAsmPrinter.cpp
U lib/Target/X86/AsmPrinter/X86IntelAsmPrinter.cpp
U lib/Target/X86/AsmPrinter/X86ATTAsmPrinter.h
U lib/Target/X86/AsmPrinter/X86IntelAsmPrinter.h
U lib/Target/X86/X86ISelLowering.h
U lib/Target/X86/X86InstrInfo.cpp
U lib/Target/X86/X86InstrBuilder.h
U lib/Target/X86/X86RegisterInfo.td
llvm-svn: 68560
|
|
|
|
|
|
|
|
|
|
| |
This introduces a small regression on the generated code
quality in the case we are just computing addresses, not
loading values.
Will work on it and on X86-64 support.
llvm-svn: 68552
|
|
|
|
|
|
|
| |
the frame reference. This will help post-RA scheduling determine
that spills to distinct stack slots are independent.
llvm-svn: 60486
|
|
|
|
| |
llvm-svn: 56829
|
|
|
|
| |
llvm-svn: 55868
|
|
|
|
| |
llvm-svn: 55867
|
|
|
|
|
|
|
|
| |
propagate kill / dead markers as new instructions are constructed in foldMemoryOperand, convertToThressAddress, etc.
- Also remove LiveVariables::instructionChanged, etc. Replace all calls with cheaper calls which update VarInfo kill list.
llvm-svn: 53097
|
|
|
|
| |
llvm-svn: 45418
|
|
|
|
|
|
| |
by Anton Korobeynikov! This is a step towards closing PR786.
llvm-svn: 28447
|
|
|
|
| |
llvm-svn: 28105
|
|
|
|
| |
llvm-svn: 28099
|
|
|
|
| |
llvm-svn: 28093
|
|
|
|
|
|
| |
* Convert tabs to spaces
llvm-svn: 21426
|
|
|
|
| |
llvm-svn: 19649
|
|
|
|
| |
llvm-svn: 19249
|
|
|
|
| |
llvm-svn: 19024
|
|
|
|
|
|
| |
by Jeff Cohen!
llvm-svn: 17008
|
|
|
|
|
|
|
|
|
| |
improvements on instruction selection that account for register and frame
index bases.
Patch contributed by Jeff Cohen. Thanks Jeff!
llvm-svn: 16110
|
|
|
|
| |
llvm-svn: 12120
|
|
|
|
| |
llvm-svn: 11818
|
|
|
|
| |
llvm-svn: 9903
|
|
|
|
| |
llvm-svn: 9360
|
|
|
|
| |
llvm-svn: 9321
|
|
|
|
| |
llvm-svn: 5288
|
|
|
|
| |
llvm-svn: 5228
|
|
|
|
| |
llvm-svn: 5182
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
| |
because arguments start two stack slots off of EBP. Break out of the
for loop once the argument is found. Increment the counter at the end
of the loop instead of the beginning. Use addRegOffset and compute
the scale * index part at compile time instead of using the fancy
load instruction. Just because an instruction set has wacky addressing
modes doesn't mean we ought to use them (at least, if you believe Dave
Patterson).
lib/Target/X86/X86InstrBuilder.h: Add some comments.
test/Regression/Jello/test-loadstore.ll: Let main return int 0.
llvm-svn: 4999
|
|
|
|
| |
llvm-svn: 4825
|