summaryrefslogtreecommitdiffstats
path: root/llvm/lib/Target/X86/X86ISelPattern.cpp
Commit message (Expand)AuthorAgeFilesLines
...
* Add an isTailCall flag to LowerCallToChris Lattner2005-05-131-3/+9
* Do not CopyFromReg physregs for live-in values. Instead, create a vreg forChris Lattner2005-05-131-31/+70
* rename the ADJCALLSTACKDOWN/ADJCALLSTACKUP nodes to be CALLSEQ_START/BEGIN.Chris Lattner2005-05-121-9/+9
* Add a new -enable-x86-fastcc option that enables passing the firstChris Lattner2005-05-121-11/+424
* Pass in Calling Convention to use into LowerCallToChris Lattner2005-05-121-3/+3
* X86 has more than just 32-bit registersChris Lattner2005-05-111-0/+6
* Convert feature of the simple isel over for the pattern isel to use.Chris Lattner2005-05-101-5/+28
* Silence some VC++ warningsJeff Cohen2005-05-101-1/+0
* Implement READPORT/WRITEPORT, implementing the last X86 regression testsChris Lattner2005-05-091-2/+102
* legalize readio/writeio into load/stores, fixing CodeGen/X86/io.llx withChris Lattner2005-05-091-0/+9
* restore some non-dead code I removed last night breaking double casts toChris Lattner2005-05-091-1/+3
* Wrap long lines, remove dead code that is now handled by legalizeChris Lattner2005-05-091-55/+8
* Fix FP -> bool castsChris Lattner2005-05-091-0/+2
* Fix X86/2005-05-08-FPStackifierPHI.ll: ugly gross hack.Chris Lattner2005-05-091-2/+19
* fix typoAndrew Lenharth2005-05-041-1/+1
* Implement count leading zeros (ctlz), count trailing zeros (cttz), and countAndrew Lenharth2005-05-031-0/+3
* Add support for FSIN/FCOS when unsafe math ops are enabled. Patch contributed byChris Lattner2005-04-301-0/+10
* Add support for FSQRT node, patch contributed by Morten OfstadChris Lattner2005-04-281-4/+8
* Implement Value* tracking for loads and stores in the selection DAG. This en...Andrew Lenharth2005-04-271-5/+5
* * Remove trailing whitespaceMisha Brukman2005-04-211-58/+58
* Handle (store &GV -> mem) as a store immediate. This often occurs forChris Lattner2005-04-211-0/+14
* Fix some mysteriously missing {}'s which cause the miscompilation ofChris Lattner2005-04-131-2/+2
* Z_E_I is goneChris Lattner2005-04-131-2/+0
* Use live out sets for return values instead of imp_defs, which is cleaner and...Chris Lattner2005-04-091-6/+20
* This target does not support/want ISD::BRCONDTWOWAYChris Lattner2005-04-091-0/+1
* X86 zero extends setcc resultsChris Lattner2005-04-071-0/+1
* Add (untested) support for MULHS and MULHU.Chris Lattner2005-04-061-0/+51
* add support for FABS and FNEGChris Lattner2005-04-021-4/+10
* This target doesn't support fabs/fneg yet.Chris Lattner2005-04-021-0/+4
* Add support for 64-bit shifts.Chris Lattner2005-04-021-16/+84
* Add support for ISD::UNDEF to the X86 beChris Lattner2005-04-011-0/+8
* don't depend on the cfg being set up yetChris Lattner2005-03-301-1/+1
* Change interface to LowerCallTo to take a boolean isVarArg argument.Nate Begeman2005-03-261-4/+4
* Remove comments that are now meaningless from the pattern ISels, at Chris'sNate Begeman2005-03-241-2/+1
* Don't emit two comparisons when comparing a FP value against zero!Chris Lattner2005-03-171-0/+1
* This mega patch converts us from using Function::a{iterator|begin|end} toChris Lattner2005-03-151-1/+1
* Silence some uninit variable warnings.Chris Lattner2005-02-231-0/+2
* We can fold promoted and non-promoted loads into divs also!Chris Lattner2005-01-251-0/+28
* Fold promoted loads into binary ops for FP, allowing us to generate m32 formsChris Lattner2005-01-251-20/+31
* Silence a warning.Chris Lattner2005-01-231-1/+1
* Speed up folding operations into loads.Chris Lattner2005-01-211-1/+2
* The ever-important vanity pass name :)Chris Lattner2005-01-211-0/+4
* Fix a FIXME: realize that argument stores are all independent (don't alias)Chris Lattner2005-01-211-6/+7
* Implement ADD_PARTS/SUB_PARTS so that 64-bit integer add/sub work. ThisChris Lattner2005-01-201-6/+32
* Fix a crash compiling 134.perl.Chris Lattner2005-01-201-21/+41
* Fix a problem where were were literally selecting for INCREASED registerChris Lattner2005-01-191-8/+8
* Implement Regression/CodeGen/X86/rotate.ll: emit rotate instructions (whichChris Lattner2005-01-191-38/+79
* Match 16-bit shld/shrd instructions as well, implementing shift-double.llx:test5Chris Lattner2005-01-191-16/+20
* Codegen long >> 2 to this:Chris Lattner2005-01-191-1/+85
* X86 shifts mask the amount.Chris Lattner2005-01-191-0/+1
OpenPOWER on IntegriCloud