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path: root/llvm/lib/Target/X86/X86ISelLowering.cpp
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* AVX512: VMOVDQU8/16/32/64 (load) intrinsic implementation.Igor Breger2016-01-241-0/+22
* [X86][SSE] Generalised TRUNC -> PACKSS/PACKUS code. NFC.Simon Pilgrim2016-01-231-16/+11
* Added missing comment. NFC.Simon Pilgrim2016-01-231-2/+3
* [X86][SSE] Remove INSERTPS dependencies from unreferenced operands.Simon Pilgrim2016-01-231-3/+13
* fix typos; NFCSanjay Patel2016-01-221-2/+2
* [X86][SSE] Improve i16 splatting shufflesSimon Pilgrim2016-01-211-0/+20
* AVX512: Store (MOVNTPD, MOVNTPS, MOVNTDQ) using non-temporal hint intrinsic i...Igor Breger2016-01-201-1/+16
* [X86][SSE] Add VZEXT_MOVL target shuffle decoding.Simon Pilgrim2016-01-191-0/+5
* [X86][SSE] Add INSERTPS target shuffle combines.Simon Pilgrim2016-01-191-0/+137
* [X86][AVX512]fix dag & add intrinsics for fixupimmAsaf Badouh2016-01-191-0/+30
* [X86][AVX2] Broadcast subvectorsSimon Pilgrim2016-01-181-3/+21
* AVX512: Masked store intrinsic implementation.Igor Breger2016-01-181-0/+28
* AVX512: Use MemIntrinsicSDNode to implement load/store intrinsic.Igor Breger2016-01-171-60/+76
* [X86][AVX] Enable extraction of upper 128-bit subvectors for 'half undef' shu...Simon Pilgrim2016-01-161-11/+28
* [Cygwin] Use -femulated-tls by default since r257718 introduced the new pass.NAKAMURA Takumi2016-01-161-5/+1
* CXX_FAST_TLS calling convention: fix issue on X86-64.Manman Ren2016-01-151-4/+5
* [X86] Don't alter HasOpaqueSPAdjustment after we've relied on itDavid Majnemer2016-01-141-1/+1
* Fixing warning by adding the X86ISD::VROTRI case. Michael Zuckerman2016-01-131-0/+1
* [AVX512] adding PROLQ and PROLD IntrinsicsMichael Zuckerman2016-01-121-0/+1
* AVX512: VPMOVAPS/PD and VPMOVUPS/PD (load) intrinsic implementation.Igor Breger2016-01-121-2/+48
* CXX_FAST_TLS calling convention: performance improvement for x86-64.Manman Ren2016-01-121-0/+60
* Optimized instruction sequence for sitofp operation on X86-32Elena Demikhovsky2016-01-101-15/+43
* [X86][AVX] Match broadcast loads through a bitcastSimon Pilgrim2016-01-091-2/+7
* [X86][AVX] Add support for i64 broadcast loads on 32-bit targetsSimon Pilgrim2016-01-091-2/+9
* Revert r257055, it caused PR26064.Nico Weber2016-01-071-7/+2
* [X86][AVX] Match broadcast loads through a bitcastSimon Pilgrim2016-01-071-2/+7
* [X86][SSE} Add INSERTPS as a target shuffleSimon Pilgrim2016-01-071-3/+17
* [X86] Determine if target shuffle can contain zero elementsSimon Pilgrim2016-01-061-15/+17
* [X86] Correctly model TLS calls w.r.t. frame requirements.Quentin Colombet2016-01-061-0/+4
* refactor divrem8 lowering; NFCISanjay Patel2016-01-061-26/+30
* PR25754: avoid generating UDIVREM8_ZEXT_HREG nodes with i64 resultArtyom Skrobov2016-01-061-1/+2
* [X86][SSE] There is no zmm addsubpd/addsubps instruction.Simon Pilgrim2016-01-061-9/+7
* [X86][SSE] An empty target shuffle mask is always a failure.Simon Pilgrim2016-01-061-7/+4
* [X86] Determine if we have an OpaqueSPAdjustment earlierDavid Majnemer2016-01-051-4/+12
* [X86][SSE] Merge PerformBLENDICombine into PerformShuffleCombineSimon Pilgrim2016-01-051-29/+26
* [X86][SSE] Ensure BLENDPD/BLENDPS/PBLEND inputs are both of the correct input...Simon Pilgrim2016-01-041-0/+3
* [X86] Make hasFP constant timeDavid Majnemer2016-01-041-0/+12
* [X86] Add intrinsics for reading and writing to the flags registerDavid Majnemer2016-01-011-0/+34
* [X86] Move shuffle decoding for constant pool into the X86CodeGen library to ...Craig Topper2015-12-311-0/+1
* [X86][PKU] Add {RD,WR}PKRU intrinsicsAsaf Badouh2015-12-311-1/+46
* [x86] lower calls to fmin and llvm.minnum.* using minss/minsd/minps/minpd (PR...Sanjay Patel2015-12-281-6/+10
* [x86] lower calls to fmax and llvm.maxnum.* using maxps/maxpd (PR24475)Sanjay Patel2015-12-281-2/+4
* [X86] Better support for the MCU psABI (LLVM part)Michael Kuperstein2015-12-281-30/+6
* [X86][AVX512] Lower broadcast sub vector to vector inrtrinsicsAsaf Badouh2015-12-281-0/+17
* [AVX512] Remove separate instruction and patterns for lowering ctlz_zero_unde...Craig Topper2015-12-271-19/+16
* AVX512: Change VPMOVB2M DAG lowering , use CVT2MASK node instead TRUNCATE.Igor Breger2015-12-271-34/+73
* [x86] lower calls to llvm.maxnum.v4f32 using maxpsSanjay Patel2015-12-261-7/+10
* [X86] Fold some variable declarations and initializations into if statements....Craig Topper2015-12-261-6/+3
* [X86] Replace MVT::SimpleValueType in the AsmParser library and getX86SubSupe...Craig Topper2015-12-251-9/+5
* AVX512: VPMOVM2B/W/D/Q intrinsic implementation.Igor Breger2015-12-241-0/+6
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