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path: root/llvm/lib/Target/X86/X86ISelLowering.cpp
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* [X86] Teach LowerBUILD_VECTOR to recognize pair-wise splats of 32-bit element...Craig Topper2018-01-171-0/+26
* [X86] When legalizing (v64i1 select i8, v64i1, v64i1) make sure not to introd...Craig Topper2018-01-171-0/+12
* [X86] Don't mutate shuffle arguments after early-out for AVX512Benjamin Kramer2018-01-171-18/+22
* [X86] Constify DebugLoc parameters. No functionality change.Benjamin Kramer2018-01-171-13/+10
* [X86] In LowerBUILD_VECTOR, rename ExtVT to EltVT so it makes sense.Craig Topper2018-01-171-7/+7
* [X86][MMX] Accept UNDEF upper bits for MOVD GR32->MMXSimon Pilgrim2018-01-161-3/+4
* [X86][MMX] Improve MMX constant generationSimon Pilgrim2018-01-161-3/+12
* [X86][MMX] Add support for MMX zero vector creationSimon Pilgrim2018-01-151-0/+7
* [X86] Use MVT::getVectorVT instead of EVT::getVectorVT when splitting 256/512...Craig Topper2018-01-151-2/+2
* [X86] Generalize some code in LowerBUILD_VECTOR. NFCCraig Topper2018-01-151-4/+10
* [X86] Remove unnecessary if statement from LowerBUILD_VECTOR. NFCICraig Topper2018-01-151-1/+1
* [X86][SSE] Support combining MOVLHPS undef inputsSimon Pilgrim2018-01-141-0/+1
* [X86] Use ISD::TRUNCATE instead of X86ISD::VTRUNC when input and output types...Craig Topper2018-01-141-14/+8
* [X86] Add X86ISD::VTRUNC to computeKnownBitsForTargetNode.Craig Topper2018-01-141-0/+12
* [X86] Improve legalization of vXi16/vXi8 selects.Craig Topper2018-01-141-5/+6
* X86: Add pattern matching for PMADDWDZvi Rackover2018-01-131-0/+110
* [X86] Add DAG combine to promote vXi1 result of a vXi8/vXi16 setcc when we ha...Craig Topper2018-01-131-1/+15
* Revert r322279 due to Skylake miscompile.David L. Jones2018-01-121-11/+0
* [X86] Legalize 128/256 gathers/scatters on KNL by using widening rather than ...Craig Topper2018-01-111-75/+38
* X86: Refactor type-splitting to target-legal size vector to a helper functionZvi Rackover2018-01-111-32/+58
* [X86][SSE] Add ISD::VECTOR_SHUFFLE to faux shuffle decodingSimon Pilgrim2018-01-111-0/+11
* X86: Fix LowerBUILD_VECTORAsVariablePermute for case Src is smaller than IndicesZvi Rackover2018-01-111-0/+5
* [X86] Fix unused variable in release builds.Craig Topper2018-01-111-2/+2
* [X86] Optimize v2i32/v2f32 scatters.Craig Topper2018-01-111-24/+50
* [SelectionDAG][X86] Explicitly store the scale in the gather/scatter ISD nodesCraig Topper2018-01-101-7/+10
* [X86][MMX] Pull out common MMX VT test. NFCI.Simon Pilgrim2018-01-101-28/+27
* [X86] Add a DAG combine to combine (sext (setcc)) with VLXCraig Topper2018-01-091-0/+42
* [X86] Remove llvm.x86.avx512.cvt*2mask.* intrinsics and autoupgrade to (icmp ...Craig Topper2018-01-091-13/+0
* [X86] Replace CVT2MASK ISD opcode with PCMPGTM compared to zero.Craig Topper2018-01-081-5/+8
* [X86] Add patterns to allow 512-bit BWI compare instructions to be used for 1...Craig Topper2018-01-081-6/+1
* [X86] Simplify some code in lower1BitVectorShuffle by relying on getNode's ab...Craig Topper2018-01-071-15/+2
* [X86] Remove unneeded code from combineGatherScatter that used to delte SIGN_...Craig Topper2018-01-071-11/+1
* [X86] Make v2i1 and v4i1 legal types without VLXCraig Topper2018-01-071-84/+41
* [X86] Call lowerShuffleAsRepeatedMaskAndLanePermute from lowerV4I64VectorShuf...Craig Topper2018-01-061-0/+6
* [X86] Remove 'else' after 'return' I forgot to cleanup before committing D41691.Craig Topper2018-01-031-4/+7
* [X86] Remove useless custom inserter for 64-bit TAILJMP and TCRETURN opcodesCraig Topper2018-01-031-10/+0
* [X86] Use ANY_EXTEND instead of SIGN_EXTEND in lowerMasksToRegCraig Topper2018-01-031-1/+1
* [x86] allow pairs of PCMPEQ for vector-sized integer equality comparisons (PR...Sanjay Patel2018-01-021-7/+31
* Strip trailing whitespace. NFCISimon Pilgrim2018-01-021-2/+2
* [X86] Promote vXi1 fp_to_uint/fp_to_sint to vXi32 to avoid scalarization.Craig Topper2018-01-011-1/+32
* [X86] Replace custom lowering of vXi1 SINT_TO_FP/UINT_TO_FP with promotion.Craig Topper2018-01-011-32/+20
* [SelectionDAG][X86][AArch64] Require targets to specify the promotion type wh...Craig Topper2018-01-011-6/+6
* [X86] In LowerTruncateVecI1, don't add SHL if the input is known to be all si...Craig Topper2018-01-011-10/+16
* [X86] Use CONCAT_VECTORS instead of INSERT_SUBVECTOR for padding v4i1/v2i1 ve...Craig Topper2017-12-311-3/+4
* [X86][AVX2] Combine extract(broadcast(scalar_value)) --> scalar_valueSimon Pilgrim2017-12-311-0/+5
* [X86][SSE] Don't vectorize splat buildvector of binops (PR30780)Simon Pilgrim2017-12-311-0/+4
* [X86] Add a DAG combine to widen (i4 (bitcast (v4i1))) before type legalizati...Craig Topper2017-12-311-0/+12
* [X86] Add a DAG combine to fix (v4i1 (bitcast (i4))) before type legalization...Craig Topper2017-12-311-1/+14
* [X86] Prevent combining (v8i1 (bitconvert (i8 load)))->(v8i1 load) if we don'...Craig Topper2017-12-311-0/+8
* [X86] Fix a crash when returning a <1 x i1> value>Craig Topper2017-12-311-0/+4
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