| Commit message (Expand) | Author | Age | Files | Lines |
|---|
| * | Revert r147945 which disabled an addressing mode transformation. I had | Chandler Carruth | 2012-01-11 | 1 | -4/+0 |
| * | Disable the transformation I added in r147936 to see if it fixes some | Chandler Carruth | 2012-01-11 | 1 | -0/+4 |
| * | Hoist a really redundant code pattern into a helper function, and delete | Chandler Carruth | 2012-01-11 | 1 | -80/+29 |
| * | Simplify the AND-rooted mask+shift checking code to match that of the | Chandler Carruth | 2012-01-11 | 1 | -8/+6 |
| * | Unify the interface of the three mask+shift transform helpers, and | Chandler Carruth | 2012-01-11 | 1 | -26/+34 |
| * | Clarify and make explicit some of the requirements for transforming | Chandler Carruth | 2012-01-11 | 1 | -52/+64 |
| * | Hoist the logic to transform shift+mask combinations into sub-register | Chandler Carruth | 2012-01-11 | 1 | -56/+68 |
| * | Teach the X86 instruction selection to do some heroic transforms to | Chandler Carruth | 2012-01-11 | 1 | -0/+146 |
| * | Don't rely on the fact that shift values are never very large, and thus | Chandler Carruth | 2012-01-09 | 1 | -1/+1 |
| * | Added missing comment about new custom lowering of DEC64 | Pete Cooper | 2011-11-16 | 1 | -0/+12 |
| * | Added custom lowering for load->dec->store sequence in x86 when the EFLAGS re... | Pete Cooper | 2011-11-15 | 1 | -0/+57 |
| * | Reapply r143206, with fixes. Disallow physical register lifetimes | Dan Gohman | 2011-11-03 | 1 | -1/+3 |
| * | Revert r143206, as there are still some failing tests. | Dan Gohman | 2011-10-29 | 1 | -3/+1 |
| * | Reapply r143177 and r143179 (reverting r143188), with scheduler | Dan Gohman | 2011-10-28 | 1 | -1/+3 |
| * | Speculatively disable Dan's commits 143177 and 143179 to see if | Duncan Sands | 2011-10-28 | 1 | -3/+1 |
| * | Eliminate LegalizeOps' LegalizedNodes map and have it just call RAUW | Dan Gohman | 2011-10-28 | 1 | -1/+3 |
| * | Add TEST8ri_NOREX pseudo to constrain sub_8bit_hi copies. | Jakob Stoklund Olesen | 2011-10-08 | 1 | -3/+4 |
| * | Teach PreprocessISelDAG to be aware of vector types and to not process them. | Bruno Cardoso Lopes | 2011-08-01 | 1 | -2/+7 |
| * | Make sure we don't combine a large displacement and a frame index in the same... | Eli Friedman | 2011-07-13 | 1 | -8/+25 |
| * | Refactor out checking for displacements on x86-64 addressing modes. No funct... | Eli Friedman | 2011-07-13 | 1 | -46/+34 |
| * | TargetConstant immediates won't be placed into registers so tighten | Eric Christopher | 2011-07-01 | 1 | -3/+4 |
| * | Fix a small thinko for constant i64 lock/orq optimization where we | Eric Christopher | 2011-06-30 | 1 | -2/+4 |
| * | Re-commit 131641 with fixes; de-pseudoize MOVSX16rr8 and friends. | Stuart Hastings | 2011-05-20 | 1 | -3/+3 |
| * | Update comment. | Eric Christopher | 2011-05-17 | 1 | -4/+4 |
| * | Support XOR and AND optimization with no return value. | Eric Christopher | 2011-05-17 | 1 | -5/+49 |
| * | Couple less magic numbers. | Eric Christopher | 2011-05-17 | 1 | -3/+5 |
| * | Make this code a little less magic number laden. | Eric Christopher | 2011-05-17 | 1 | -12/+30 |
| * | Turn this into a table, this will make more sense shortly. | Eric Christopher | 2011-05-11 | 1 | -11/+29 |
| * | Optimize atomic lock or that doesn't use the result value. | Eric Christopher | 2011-05-10 | 1 | -0/+81 |
| * | Silence an overzealous uninitialized variable warning from GCC. | Benjamin Kramer | 2011-04-23 | 1 | -1/+1 |
| * | X86: Try to use a smaller encoding by transforming (X << C1) & C2 into (X & (... | Benjamin Kramer | 2011-04-22 | 1 | -0/+75 |
| * | Swap VT and DebugLoc operands of getExtLoad() for consistency with | Stuart Hastings | 2011-02-16 | 1 | -1/+1 |
| * | Enhance ComputeMaskedBits to know that aligned frameindexes | Chris Lattner | 2011-02-13 | 1 | -21/+2 |
| * | lib/Target/X86/X86ISelDAGToDAG.cpp: __main should be WINCALL64 on Win64. | NAKAMURA Takumi | 2011-01-27 | 1 | -1/+1 |
| * | fix PR8514, a bug where the "heroic" transformation of shift/and | Chris Lattner | 2011-01-16 | 1 | -13/+9 |
| * | 'HiReg' is written but never read. Nuke its | Ted Kremenek | 2011-01-14 | 1 | -5/+5 |
| * | PR8918 - When used with MinGW64, LLVM generates a "calll __main" at the | Bill Wendling | 2011-01-06 | 1 | -2/+5 |
| * | rename MVT::Flag to MVT::Glue. "Flag" is a terrible name for | Chris Lattner | 2010-12-21 | 1 | -5/+5 |
| * | it turns out that when ".with.overflow" intrinsics were added to the X86 | Chris Lattner | 2010-12-05 | 1 | -4/+30 |
| * | Use a MemIntrinsicSDNode for ISD::PREFETCH, which touches | Dale Johannesen | 2010-10-26 | 1 | -1/+0 |
| * | Use #NAME# to have the CMOV multiclass define things with the same names as b... | Chris Lattner | 2010-10-05 | 1 | -3/+3 |
| * | switch CMOVBE to the multipattern: | Chris Lattner | 2010-10-05 | 1 | -3/+3 |
| * | Temporarily work around new address lowering while I figure out what | Eric Christopher | 2010-09-22 | 1 | -1/+2 |
| * | reimplement elf TLS support in terms of addressing modes, eliminating Segment... | Chris Lattner | 2010-09-22 | 1 | -43/+35 |
| * | convert the last 4 X86ISD nodes that should have memoperands to have them. | Chris Lattner | 2010-09-22 | 1 | -5/+1 |
| * | give X86ISD::FNSTCW16m a memoperand, since it touches memory. It only | Chris Lattner | 2010-09-22 | 1 | -1/+0 |
| * | give FP_TO_INT16_IN_MEM and friends a memoperand. They are only | Chris Lattner | 2010-09-22 | 1 | -3/+1 |
| * | give VZEXT_LOAD a memory operand, it now works with segment registers. | Chris Lattner | 2010-09-22 | 1 | -1/+0 |
| * | revert r114386 now that address modes work correctly, we get a nice | Chris Lattner | 2010-09-22 | 1 | -4/+0 |
| * | give LCMPXCHG_DAG[8] a memory operand, allowing it to work with addrspace 256... | Chris Lattner | 2010-09-21 | 1 | -1/+0 |
