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* assert(0) -> LLVM_UNREACHABLE.Torok Edwin2009-07-111-2/+3
| | | | | | | | | Make llvm_unreachable take an optional string, thus moving the cerr<< out of line. LLVM_UNREACHABLE is now a simple wrapper that makes the message go away for NDEBUG builds. llvm-svn: 75379
* Fix PR4485.Rafael Espindola2009-06-301-3/+6
| | | | | | | Avoid unnecessary duplication of operand 0 of X86::FpSET_ST0_80. This duplication would cause one register to remain on the stack at the function return. llvm-svn: 74534
* Fix PR4484.Rafael Espindola2009-06-301-3/+5
| | | | | | This was caused by me confounding FP0 and ST(0). llvm-svn: 74523
* FIX PR 4459.Rafael Espindola2009-06-291-1/+1
| | | | | | | Not sure I understand how the temp register gets used, but this fixes a bug and introduces no regressions. llvm-svn: 74446
* Fix PR4185.Rafael Espindola2009-06-211-2/+7
| | | | | | Handle FpSET_ST0_80 being used when ST0 is still alive. llvm-svn: 73850
* Have only one definition of X86AddrNumOperands.Rafael Espindola2009-03-281-1/+0
| | | | llvm-svn: 67949
* Make code a bit less brittle by no hardcoding the numberRafael Espindola2009-03-281-1/+2
| | | | | | of operands in an address in so many places. llvm-svn: 67945
* Model inline asm constraint which ties an input to an output register as ↵Evan Cheng2009-03-231-2/+30
| | | | | | machine operand TIED_TO constraint. This eliminated the need to pre-allocate registers for these. This also allows register allocator can eliminate the unneeded copies. llvm-svn: 67512
* Remove non-DebugLoc versions of BuildMI from X86.Dale Johannesen2009-02-131-6/+15
| | | | | | There were some that might even matter in X86FastISel. llvm-svn: 64437
* Implement FpSET_ST1_*.Evan Cheng2009-02-091-1/+15
| | | | llvm-svn: 64186
* Switch the MachineOperand accessors back to the short names likeDan Gohman2008-10-031-4/+4
| | | | | | isReg, etc., from isRegister, etc. llvm-svn: 57006
* Instead of setPreservesAll, just mark them preseving machine loop info and ↵Evan Cheng2008-09-221-1/+2
| | | | | | machine dominators. llvm-svn: 56475
* Mark several codegen passes as preserving all analysis.Evan Cheng2008-09-221-0/+5
| | | | llvm-svn: 56469
* Remove isImm(), isReg(), and friends, in favor of Dan Gohman2008-09-131-2/+2
| | | | | | | | | isImmediate(), isRegister(), and friends, to avoid confusion about having two different names with the same meaning. I'm not attached to the longer names, and would be ok with changing to the shorter names if others prefer it. llvm-svn: 56189
* Tidy up several unbeseeming casts from pointer to intptr_t.Dan Gohman2008-09-041-1/+1
| | | | llvm-svn: 55779
* Remove more uses of std::set.Owen Anderson2008-08-141-3/+3
| | | | llvm-svn: 54787
* Eliminate a compilation warning.Evan Cheng2008-07-211-0/+4
| | | | llvm-svn: 53873
* Pool-allocation for MachineInstrs, MachineBasicBlocks, andDan Gohman2008-07-071-1/+1
| | | | | | | | | | | MachineMemOperands. The pools are owned by MachineFunctions. This drastically reduces the number of calls to malloc/free made during the "Emit" phase of scheduling, as well as later phases in CodeGen. Combined with other changes, this speeds up the "instruction selection" phase of CodeGen by 10% in some cases. llvm-svn: 53212
* Restore this assert now that the livevar bug is fixed.Chris Lattner2008-03-211-2/+7
| | | | | | This verifies kill info for "ret" fp operands is right. llvm-svn: 48656
* remove Evan's "ugly hack" that sorta attempted to get Chris Lattner2008-03-211-5/+0
| | | | | | | x86-64 return conventions correct, but was never enabled. We can now do the "right thing" with multiple return values. llvm-svn: 48635
* Add support for calls that return two FP values inChris Lattner2008-03-211-0/+36
| | | | | | ST(0)/ST(1). llvm-svn: 48634
* disable a bogus assertion.Chris Lattner2008-03-211-2/+2
| | | | llvm-svn: 48633
* Enable support for returning two long-double values in ST(0)/ST(1).Chris Lattner2008-03-211-4/+1
| | | | | | | | | | | | | | This allows us to compile fp-stack-2results.ll into: _test: fldz fld1 ret which returns 1 in ST(0) and 0 in ST(1). This is needed for x86-64 _Complex long double. llvm-svn: 48632
* Implement basic support for the 'f' register class constraint. This basicallyChris Lattner2008-03-111-2/+45
| | | | | | works, but probably won't if you mix it with 't' or 'u' yet. llvm-svn: 48243
* Fix the build on gcc 4.2.Nick Lewycky2008-03-111-1/+1
| | | | llvm-svn: 48212
* Change the model for FP Stack return to use fp operands on the Chris Lattner2008-03-111-18/+100
| | | | | | | RET instruction instead of using FpSET_ST0_32. This also generalizes the code to handling returning of multiple FP results. llvm-svn: 48209
* rename FP_SETRESULT -> FP_SET_ST0Chris Lattner2008-03-091-3/+3
| | | | llvm-svn: 48094
* rename FpGETRESULT32 -> FpGET_ST0_32 etc. Add support forChris Lattner2008-03-091-5/+5
| | | | | | | isel'ing value preserving FP roundings from one fp stack reg to another into a noop, instead of stack traffic. llvm-svn: 48093
* Refactor code. Remove duplicated functions that basically do the same thing asEvan Cheng2008-03-051-20/+8
| | | | | | findRegisterUseOperandIdx, findRegisterDefOperandIndx. Fix some naming inconsistencies. llvm-svn: 47927
* Work in progress. This patch *fixes* x86-64 calls which are modelled as ↵Evan Cheng2008-01-291-0/+5
| | | | | | | | StructRet but really should be return in registers, e.g. _Complex long double, some 128-bit aggregates. This is a short term solution that is necessary only because llvm, for now, cannot model i128 nor call's with multiple results. Status: This only works for direct calls, and only the caller side is done. Disabled for now. llvm-svn: 46527
* Improve the FP stackifier to decide all on its own whether Chris Lattner2008-01-141-23/+30
| | | | | | | | | an instruction kills a register or not. This is cheap and easy to do now that instructions record this on their flags, and this eliminates the second pass of LiveVariables from the x86 backend. This speeds up a release llc by ~2.5%. llvm-svn: 45955
* rename MachineInstr::setInstrDescriptor -> setDescChris Lattner2008-01-111-6/+6
| | | | llvm-svn: 45871
* rename TargetInstrDescriptor -> TargetInstrDesc.Chris Lattner2008-01-071-5/+5
| | | | | | | Make MachineInstr::getDesc return a reference instead of a pointer, since it can never be null. llvm-svn: 45695
* Move a bunch more accessors from TargetInstrInfo to TargetInstrDescriptorChris Lattner2008-01-071-4/+4
| | | | llvm-svn: 45680
* Rename MachineInstr::getInstrDescriptor -> getDesc(), which reflectsChris Lattner2008-01-071-5/+5
| | | | | | | | | | | | | | | that it is cheap and efficient to get. Move a variety of predicates from TargetInstrInfo into TargetInstrDescriptor, which makes it much easier to query a predicate when you don't have TII around. Now you can use MI->getDesc()->isBranch() instead of going through TII, and this is much more efficient anyway. Not all of the predicates have been moved over yet. Update old code that used MI->getInstrDescriptor()->Flags to use the new predicates in many places. llvm-svn: 45674
* Rename SSARegMap -> MachineRegisterInfo in keeping with the idea Chris Lattner2007-12-311-1/+2
| | | | | | | | | | | | | | that "machine" classes are used to represent the current state of the code being compiled. Given this expanded name, we can start moving other stuff into it. For now, move the UsedPhysRegs and LiveIn/LoveOuts vectors from MachineFunction into it. Update all the clients to match. This also reduces some needless #includes, such as MachineModuleInfo from MachineFunction. llvm-svn: 45467
* Remove attribution from file headers, per discussion on llvmdev.Chris Lattner2007-12-291-2/+2
| | | | llvm-svn: 45418
* Enabling new condition code modeling scheme.Evan Cheng2007-09-291-33/+0
| | | | llvm-svn: 42459
* New style x87 cmp instructions.Evan Cheng2007-09-251-0/+6
| | | | llvm-svn: 42312
* Added support for new condition code modeling scheme (i.e. physical register ↵Evan Cheng2007-09-251-0/+27
| | | | | | | | dependency). These are a bunch of instructions that are duplicated so the x86 backend can support both the old and new schemes at the same time. They will be deleted after all the kinks are worked out. llvm-svn: 42285
* another long double bugletDale Johannesen2007-09-201-0/+1
| | | | llvm-svn: 42159
* Remove RSTRegClass case from loadRegFromStackSlotDale Johannesen2007-09-171-1/+1
| | | | | | | | | and storeRegToStackSlot. Evan and I concluded this should never be needed and it appears to be true. (It if is needed, adjustment would be needed for long double to work.) llvm-svn: 42049
* Remove isReg, isImm, and isMBB, and change all their users to use Dan Gohman2007-09-141-1/+1
| | | | | | | isRegister, isImmediate, and isMachineBasicBlock, which are equivalent, and more popular. llvm-svn: 41958
* My compiler warns about the semicolon.Duncan Sands2007-09-111-1/+1
| | | | llvm-svn: 41840
* Add lengthof and endof templates that hide a lot of sizeof computations.Owen Anderson2007-09-071-7/+5
| | | | | | Patch by Sterling Stein! llvm-svn: 41758
* Long double patch 8 of N: make it partially work inDale Johannesen2007-08-071-0/+3
| | | | | | | | | | | SSE mode (all but conversions <-> other FP types, I think): >>Do not mark all-80-bit operations as "Requires[FPStack]" (which really means "not SSE"). >>Refactor load-and-extend to facilitate this. >>Update comments. >>Handle long double in SSE when computing FP_REG_KILL. llvm-svn: 40906
* Long double patch 7 of N, unless I lost count:). Dale Johannesen2007-08-071-0/+6
| | | | | | | | Last x87 bits for full functionality (not thoroughly tested, and long doubles do not work in SSE modes at all - use -mcpu=i486 for now) llvm-svn: 40886
* Get X86 long double calling convention to workDale Johannesen2007-08-061-0/+18
| | | | | | | (on Darwin, anyway). Fix some table omissions for LD arithmetic. llvm-svn: 40877
* Make 80-bit store maintain simulated FP stack correctly.Dale Johannesen2007-08-061-1/+2
| | | | llvm-svn: 40868
* Long double patch 4 of N: initial x87 implementation.Dale Johannesen2007-08-051-2/+60
| | | | | | Lots of problems yet but some simple things work. llvm-svn: 40847
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