| Commit message (Collapse) | Author | Age | Files | Lines |
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(gcc-4.6 warns about these).
llvm-svn: 117021
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bad code when assertions are off. rdar://8540457.
llvm-svn: 116368
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llvm-svn: 111383
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clang says is unused.
llvm-svn: 111167
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llvm-svn: 111155
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llvm-svn: 110460
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llvm-svn: 110410
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address of the static
ID member as the sole unique type identifier. Clean up APIs related to this change.
llvm-svn: 110396
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llvm-svn: 108625
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The isLive() method can read uninitialized memory, but it still gives correct
results.
llvm-svn: 108561
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llvm-svn: 108535
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FP_REG_KILL instructions are still inserted, but can be disabled by passing
-live-x87 to llc. The X87FPRegKillInserterPass is going to be removed shortly.
CFG edges are partioned into bundles where the x87 stack must be allocated
identically. Code is insertad at the end of each basic block that shuffles the
live FP registers to match the outgoing bundles expectations.
This fix is in preparation for some upcoming register allocator improvements
that may extend the live range of registers beyond a basic block, similar to
LICM. It also provides a nice runtime speedup if you are building with
-mfpmath=387.
llvm-svn: 108529
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Based on a patch by Rafael Espíndola.
Attempt to make the FpSET_ST1 hack more robust, but we are still relying on
FpSET_ST0 preceeding it. This is only for supporting really weird x87 inline
asm.
We support:
FpSET_ST0
INLINEASM
FpSET_ST0
FpSET_ST1
INLINEASM
with and without kills on the arguments. We don't support:
FpSET_ST1
FpSET_ST0
INLINEASM
nor
FpSET_ST1
INLINEASM
Just Don't Do It!
llvm-svn: 108047
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X86 memory operand.
llvm-svn: 107925
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This pass runs before COPY instructions are passed to copyPhysReg, so we simply
translate COPY to the proper pseudo instruction. Note that copyPhysReg does not
handle floating point stack copies.
Once COPY is used everywhere, this can be cleaned up a bit, and most of the
pseudo instructions can be removed.
llvm-svn: 107899
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llvm-svn: 106542
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immediates to avoid breaking the build.
llvm-svn: 105652
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In file included from X86InstrInfo.cpp:16:
X86GenInstrInfo.inc:2789: error: integer constant is too large for 'long' type
X86GenInstrInfo.inc:2790: error: integer constant is too large for 'long' type
X86GenInstrInfo.inc:2792: error: integer constant is too large for 'long' type
X86GenInstrInfo.inc:2793: error: integer constant is too large for 'long' type
X86GenInstrInfo.inc:2808: error: integer constant is too large for 'long' type
X86GenInstrInfo.inc:2809: error: integer constant is too large for 'long' type
X86GenInstrInfo.inc:2816: error: integer constant is too large for 'long' type
X86GenInstrInfo.inc:2817: error: integer constant is too large for 'long' type
llvm-svn: 105524
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yet, only assembly encoding support.
llvm-svn: 105521
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instruction.
This instruction would crash the pass:
INLINEASM <es:foo $0 $1>, 9, %FP0<kill>, 9, %FP0<kill>, 14, %EFLAGS<earlyclobber,def,dead>
Now it doesn't.
llvm-svn: 102509
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into TargetOpcodes.h. #include the new TargetOpcodes.h
into MachineInstr. Add new inline accessors (like isPHI())
to MachineInstr, and start using them throughout the
codebase.
llvm-svn: 95687
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llvm-svn: 92654
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Patch by Howard Hinnant!
llvm-svn: 90365
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VISIBILITY_HIDDEN removal.
llvm-svn: 85043
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Chris claims we should never have visibility_hidden inside any .cpp file but
that's still not true even after this commit.
llvm-svn: 85042
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depth first order, so it wouldn't process unreachable blocks.
When compiling at -O0, late dead block elimination isn't done
and the bad instructions got to isel.
llvm-svn: 81187
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llvm-svn: 79834
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MachineInstr and MachineOperand. This required eliminating a
bunch of stuff that was using DOUT, I hope that bill doesn't
mind me stealing his fun. ;-)
llvm-svn: 79813
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- Tidy up some headers.
llvm-svn: 77929
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llvm-svn: 77757
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This adds location info for all llvm_unreachable calls (which is a macro now) in
!NDEBUG builds.
In NDEBUG builds location info and the message is off (it only prints
"UREACHABLE executed").
llvm-svn: 75640
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Make llvm_unreachable take an optional string, thus moving the cerr<< out of
line.
LLVM_UNREACHABLE is now a simple wrapper that makes the message go away for
NDEBUG builds.
llvm-svn: 75379
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Avoid unnecessary duplication of operand 0 of X86::FpSET_ST0_80. This duplication would
cause one register to remain on the stack at the function return.
llvm-svn: 74534
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This was caused by me confounding FP0 and ST(0).
llvm-svn: 74523
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Not sure I understand how the temp register gets used,
but this fixes a bug and introduces no regressions.
llvm-svn: 74446
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Handle FpSET_ST0_80 being used when ST0 is still alive.
llvm-svn: 73850
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llvm-svn: 67949
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of operands in an address in so many places.
llvm-svn: 67945
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machine operand TIED_TO constraint. This eliminated the need to pre-allocate registers for these. This also allows register allocator can eliminate the unneeded copies.
llvm-svn: 67512
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There were some that might even matter in X86FastISel.
llvm-svn: 64437
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llvm-svn: 64186
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isReg, etc., from isRegister, etc.
llvm-svn: 57006
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machine dominators.
llvm-svn: 56475
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llvm-svn: 56469
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isImmediate(), isRegister(), and friends, to avoid confusion
about having two different names with the same meaning. I'm
not attached to the longer names, and would be ok with
changing to the shorter names if others prefer it.
llvm-svn: 56189
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llvm-svn: 55779
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llvm-svn: 54787
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llvm-svn: 53873
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MachineMemOperands. The pools are owned by MachineFunctions.
This drastically reduces the number of calls to malloc/free made
during the "Emit" phase of scheduling, as well as later phases
in CodeGen. Combined with other changes, this speeds up the
"instruction selection" phase of CodeGen by 10% in some cases.
llvm-svn: 53212
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This verifies kill info for "ret" fp operands is right.
llvm-svn: 48656
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