summaryrefslogtreecommitdiffstats
path: root/llvm/lib/Target/X86/X86FloatingPoint.cpp
Commit message (Collapse)AuthorAgeFilesLines
* X86FloatingPoint: Fix livein listsMatthias Braun2017-05-311-15/+21
| | | | | | | | | | | | After transforming FP to ST registers: - Do not add the ST register to the livein lists, they are reserved so we do not need to track their liveness. - Remove the FP registers from the livein lists, they don't have defs or uses anymore and so are not live. - (The setKillFlags() call is moved to an earlier place as it relies on the FP registers still being present in the livein list.) llvm-svn: 304342
* X86FloatingPoint: Add some static assert, cleanup; NFCMatthias Braun2017-05-311-2/+6
| | | | llvm-svn: 304341
* LivePhysRegs: Rework constructor + documentation; NFCMatthias Braun2017-05-261-2/+2
| | | | | | | - Take reference instead of pointer to a TRI that cannot be nullptr. - Improve documentation comments. llvm-svn: 304038
* [X86] RegCall - Handling long double argumentsOren Ben Simhon2016-11-201-5/+40
| | | | | | | | | | The change is part of RegCall calling convention support for LLVM. Long double (f80) requires special treatment as the first f80 parameter is saved in FP0 (floating point stack). This review present the change and the corresponding tests. Differential Revision: https://reviews.llvm.org/D26151 llvm-svn: 287485
* Modify df_iterator to support post-order actionsDavid Callahan2016-10-051-1/+1
| | | | | | | | | | | | Summary: This makes a change to the state used to maintain visited information for depth first iterator. We know assume a method "completed(...)" which is called after all children of a node have been visited. In all existing cases, this method does nothing so this patch has no functional changes. It will however allow a client to distinguish back from cross edges in a DFS tree. Reviewers: nadav, mehdi_amini, dberlin Subscribers: MatzeB, mzolotukhin, twoh, freik, llvm-commits Differential Revision: https://reviews.llvm.org/D25191 llvm-svn: 283391
* Use StringRef in Pass/PassManager APIs (NFC)Mehdi Amini2016-10-011-1/+1
| | | | llvm-svn: 283004
* MachineFunctionProperties/MIRParser: Rename AllVRegsAllocated->NoVRegs, ↵Matthias Braun2016-08-251-1/+1
| | | | | | | | | | | | | compute it Rename AllVRegsAllocated to NoVRegs. This avoids the connotation of running after register and simply describes that no vregs are used in a machine function. With that we can simply compute the property and do not need to dump/parse it in .mir files. Differential Revision: http://reviews.llvm.org/D23850 llvm-svn: 279698
* X86: Avoid implicit iterator conversions, NFCDuncan P. N. Exon Smith2016-07-121-119/+119
| | | | | | | | Avoid implicit conversions from MachineInstrBundleIterator to MachineInstr*, mainly by preferring MachineInstr& over MachineInstr* and using range-based for loops. llvm-svn: 275149
* Run clang-tidy's performance-unnecessary-copy-initialization over LLVM.Benjamin Kramer2016-06-121-1/+1
| | | | | | No functionality change intended. llvm-svn: 272516
* livePhysRegs: Pass MBB by reference in addLive{Ins|Outs}(); NFCMatthias Braun2016-05-031-1/+1
| | | | | | | The block must no be nullptr for the addLiveIns()/addLiveOuts() function. llvm-svn: 268340
* Add MachineFunctionProperty checks for AllVRegsAllocated for target passesDerek Schuff2016-04-041-0/+5
| | | | | | | | | | | | | | Summary: This adds the same checks that were added in r264593 to all target-specific passes that run after register allocation. Reviewers: qcolombet Subscribers: jyknight, dsanders, llvm-commits Differential Revision: http://reviews.llvm.org/D18525 llvm-svn: 265313
* Unified the handling of returns in the X87 stackifier so that the stackifierDavid L Kreitzer2016-03-101-90/+93
| | | | | | | | runs successfully on routines containing IRETs. This fixes PR26410. Differential Revision: http://reviews.llvm.org/D17643 llvm-svn: 263120
* [X86] Support cleaning more than 2**16 bytes of stackDavid Majnemer2016-03-041-0/+1
| | | | | | | | | | | | | | | | | | | The x86 ret instruction has a 16 bit immediate indicating how many bytes to pop off of the stack beyond the return address. There is a problem when extremely large structs are passed by value: we might not be able to fit the number of bytes to pop into the return instruction. To fix this, expand RET_FLAG a little later and use a special sequence to clean the stack: pop %ecx ; return address is now in %ecx add $n, %esp ; clean the stack push %ecx ; bring the return address back on the stack ret ; pop the return address and jmp to it's value llvm-svn: 262755
* Reformatted a comment to fit the 80 column limit. NFC.David L Kreitzer2016-02-251-2/+2
| | | | llvm-svn: 261916
* Remove uses of builtin comma operator.Richard Trieu2016-02-181-1/+2
| | | | | | Cleanup for upcoming Clang warning -Wcomma. No functionality change intended. llvm-svn: 261270
* X86: Remove implicit ilist iterator conversions, NFCDuncan P. N. Exon Smith2015-10-191-8/+7
| | | | llvm-svn: 250741
* Replace a custom table sort check with std::is_sorted. Change a function to ↵Craig Topper2015-10-171-17/+8
| | | | | | take ArrayRef instead of pointer and length. NFC llvm-svn: 250615
* Save LaneMask with livein registersMatthias Braun2015-09-091-3/+3
| | | | | | | | | | | | | | | | | With subregister liveness enabled we can detect the case where only parts of a register are live in, this is expressed as a 32bit lanemask. The current code only keeps registers in the live-in list and therefore enumerated all subregisters affected by the lanemask. This turned out to be too conservative as the subregister may also cover additional parts of the lanemask which are not live. Expressing a given lanemask by enumerating a minimum set of subregisters is computationally expensive so the best solution is to simply change the live-in list to store the lanemasks as well. This will reduce memory usage for targets using subregister liveness and slightly increase it for other targets Differential Revision: http://reviews.llvm.org/D12442 llvm-svn: 247171
* [X86] Remove references to _ftol2Michael Kuperstein2015-08-251-25/+0
| | | | | | | As of r245924, _ftol2 is no longer used for fptoui on MS platforms. Remove the dead code associated with it. llvm-svn: 245925
* MachineBasicBlock: Add liveins() method returning an iterator_rangeMatthias Braun2015-08-241-5/+3
| | | | llvm-svn: 245895
* MachineRegisterInfo: Remove UsedPhysReg infrastructureMatthias Braun2015-07-141-1/+2
| | | | | | | | | | | | | We have a detailed def/use lists for every physical register in MachineRegisterInfo anyway, so there is little use in maintaining an additional bitset of which ones are used. Removing it frees us from extra book keeping. This simplifies VirtRegMap. Differential Revision: http://reviews.llvm.org/D10911 llvm-svn: 242173
* [X86] Fix a bug in WIN_FTOL_32/64 handling.Michael Kuperstein2015-06-301-1/+1
| | | | | | | | | | Duplicating an FP register "as itself" is a bad idea, since it violates the invariant that every FP register is mapped to at most one FPU stack slot. Use the scratch FP register instead. This fixes PR23957. llvm-svn: 241069
* Revert r240137 (Fixed/added namespace ending comments using clang-tidy. NFC)Alexander Kornienko2015-06-231-2/+2
| | | | | | Apparently, the style needs to be agreed upon first. llvm-svn: 240390
* Fixed/added namespace ending comments using clang-tidy. NFCAlexander Kornienko2015-06-191-2/+2
| | | | | | | | | | | | | The patch is generated using this command: tools/clang/tools/extra/clang-tidy/tool/run-clang-tidy.py -fix \ -checks=-*,llvm-namespace-comment -header-filter='llvm/.*|clang/.*' \ llvm/lib/ Thanks to Eugene Kosov for the original patch! llvm-svn: 240137
* Re-sort includes with sort-includes.py and insert raw_ostream.h where it's used.Benjamin Kramer2015-03-231-1/+1
| | | | llvm-svn: 232998
* [llvm] Replacing asserts with static_asserts where appropriateGabor Horvath2015-03-161-1/+1
| | | | | | | | | | | | | | | | Summary: This patch consists of the suggestions of clang-tidy/misc-static-assert check. Reviewers: alexfh Reviewed By: alexfh Subscribers: xazax.hun, llvm-commits Differential Revision: http://reviews.llvm.org/D8343 llvm-svn: 232366
* Rewrite MachineOperand::print and MachineInstr::print to avoidEric Christopher2015-02-271-1/+1
| | | | | | | | | | | | uses of TM->getSubtargetImpl and propagate to all calls. This could be a debugging regression in places where we had a TargetMachine and/or MachineFunction but don't have it as part of the MachineInstr. Fixing this would require passing a MachineFunction/Function down through the print operator, but none of the existing uses in tree seem to do this. llvm-svn: 230710
* MathExtras: Bring Count(Trailing|Leading)Ones and CountPopulation in line ↵Benjamin Kramer2015-02-121-5/+5
| | | | | | | | with countTrailingZeros Update all callers. llvm-svn: 228930
* Update SetVector to rely on the underlying set's insert to return a ↵David Blaikie2014-11-191-1/+1
| | | | | | | | | | | | | pair<iterator, bool> This is to be consistent with StringSet and ultimately with the standard library's associative container insert function. This lead to updating SmallSet::insert to return pair<iterator, bool>, and then to update SmallPtrSet::insert to return pair<iterator, bool>, and then to update all the existing users of those functions... llvm-svn: 222334
* Work around bugs in MSVC "14" CTP 3's conversion logicReid Kleckner2014-10-311-1/+3
| | | | | | | | | | It appears to ignore or find ambiguous MachineInstrBuilder's conversion operators that allow conversion to MachineInstr* and MachineBasicBlock::bundle_iterator. As a workaround, add an explicit way to get the MachineInstr. llvm-svn: 221017
* Move constant-sized bitvector to the stack.Benjamin Kramer2014-09-111-2/+2
| | | | llvm-svn: 217600
* Use range based for loops to avoid needing to re-mention SmallPtrSet size.Craig Topper2014-08-241-4/+2
| | | | llvm-svn: 216351
* [X86, X87 stackifier] Do not mark an operand of a debug instruction as kill.Akira Hatanaka2014-08-191-0/+3
| | | | | | <rdar://problem/16952634> llvm-svn: 215962
* Have MachineFunction cache a pointer to the subtarget to make lookupsEric Christopher2014-08-051-2/+2
| | | | | | | | | | | shorter/easier and have the DAG use that to do the same lookup. This can be used in the future for TargetMachine based caching lookups from the MachineFunction easily. Update the MIPS subtarget switching machinery to update this pointer at the same time it runs. llvm-svn: 214838
* Remove the TargetMachine forwards for TargetSubtargetInfo basedEric Christopher2014-08-041-3/+4
| | | | | | information and update all callers. No functional change. llvm-svn: 214781
* [X86] Place parentheses around "isMask_32(STReturns) && N <= 2".Akira Hatanaka2014-08-041-1/+1
| | | | | | This corrects r214672, which was committed to silence a gcc warning. llvm-svn: 214732
* Improving the name of the function parameter, which happens to solve two ↵Aaron Ballman2014-08-041-14/+14
| | | | | | likely-less-than-useful MSVC warnings: warning C4258: 'I' : definition from the for loop is ignored; the definition from the enclosing scope is used. llvm-svn: 214717
* X86: silence warning (-Wparentheses)Saleem Abdulrasool2014-08-031-1/+1
| | | | | | | | | GCC 4.8.2 points out the ambiguity in evaluation of the assertion condition: lib/Target/X86/X86FloatingPoint.cpp:949:49: warning: suggest parentheses around ‘&&’ within ‘||’ [-Wparentheses] assert(STReturns == 0 || isMask_32(STReturns) && N <= 2); llvm-svn: 214672
* [X86] Simplify X87 stackifier pass.Akira Hatanaka2014-08-011-221/+131
| | | | | | | | | | | | | | | | | | | Stop using ST registers for function returns and inline-asm instructions and use FP registers instead. This allows removing a large amount of code in the stackifier pass that was needed to track register liveness and handle copies between ST and FP registers and function calls returning floating point values. It also fixes a bug which manifests when an ST register defined by an inline-asm instruction was live across another inline-asm instruction, as shown in the following sequence of machine instructions: 1. INLINEASM <es:frndint> $0:[regdef], %ST0<imp-def,tied5> 2. INLINEASM <es:fldcw $0> 3. %FP0<def> = COPY %ST0 <rdar://problem/16952634> llvm-svn: 214580
* [C++] Use 'nullptr'. Target edition.Craig Topper2014-04-251-1/+1
| | | | llvm-svn: 207197
* [Modules] Fix potential ODR violations by sinking the DEBUG_TYPEChandler Carruth2014-04-221-1/+2
| | | | | | | definition below all of the header #include lines, lib/Target/... edition. llvm-svn: 206842
* [C++11] Add 'override' keyword to virtual methods that override their base ↵Craig Topper2014-03-091-3/+3
| | | | | | class. llvm-svn: 203378
* [C++11] Replace llvm::next and llvm::prior with std::next and std::prev.Benjamin Kramer2014-03-021-4/+4
| | | | | | Remove the old functions. llvm-svn: 202636
* [x86] Fix retq/retl handling in 64-bit modeDavid Woodhouse2014-01-131-1/+2
| | | | | | | | | | | | | | | | | | | | | | | | | This finishes the job started in r198756, and creates separate opcodes for 64-bit vs. 32-bit versions of the rest of the RET instructions too. LRETL/LRETQ are interesting... I can't see any justification for their existence in the SDM. There should be no 'LRETL' in 64-bit mode, and no need for a REX.W prefix for LRETQ. But this is what GAS does, and my Sandybridge CPU and an Opteron 6376 concur when tested as follows: asm __volatile__("pushq $0x1234\nmovq $0x33,%rax\nsalq $32,%rax\norq $1f,%rax\npushq %rax\nlretl $8\n1:"); asm __volatile__("pushq $1234\npushq $0x33\npushq $1f\nlretq $8\n1:"); asm __volatile__("pushq $0x33\npushq $1f\nlretq\n1:"); asm __volatile__("pushq $0x1234\npushq $0x33\npushq $1f\nlretq $8\n1:"); cf. PR8592 and commit r118903, which added LRETQ. I only added LRETIQ to match it. I don't quite understand how the Intel syntax parsing for ret instructions is working, despite r154468 allegedly fixing it. Aren't the explicitly sized 'retw', 'retd' and 'retq' supposed to work? I have at least made the 'lretq' work with (and indeed *require*) the 'q'. llvm-svn: 199106
* [x86] Disambiguate RET[QL] and fix aliases for 16-bit modeDavid Woodhouse2014-01-081-1/+2
| | | | | | | | | | I couldn't see how to do this sanely without splitting RETQ from RETL. Eric says: "sad about the inability to roundtrip them now, but...". I have no idea what that means, but perhaps it wants preserving in the commit comment. llvm-svn: 198756
* Mark that the _ftol2 function used by windows on x86 to handle fptoui ↵Craig Topper2013-07-211-0/+1
| | | | | | modifies ECX. llvm-svn: 186787
* Fix an off-by-one error. Also make the code a little more explicit in what itChad Rosier2013-06-281-3/+4
| | | | | | is trying to do. llvm-svn: 185191
* Replace Count{Leading,Trailing}Zeros_{32,64} with count{Leading,Trailing}Zeros.Michael J. Spencer2013-05-241-5/+5
| | | | llvm-svn: 182680
* Move all of the header files which are involved in modelling the LLVM IRChandler Carruth2013-01-021-1/+1
| | | | | | | | | | | | | | | | | | | | | into their new header subdirectory: include/llvm/IR. This matches the directory structure of lib, and begins to correct a long standing point of file layout clutter in LLVM. There are still more header files to move here, but I wanted to handle them in separate commits to make tracking what files make sense at each layer easier. The only really questionable files here are the target intrinsic tablegen files. But that's a battle I'd rather not fight today. I've updated both CMake and Makefile build systems (I think, and my tests think, but I may have missed something). I've also re-sorted the includes throughout the project. I'll be committing updates to Clang, DragonEgg, and Polly momentarily. llvm-svn: 171366
* Use the new script to sort the includes of every file under lib.Chandler Carruth2012-12-031-2/+2
| | | | | | | | | | | | | | | | | Sooooo many of these had incorrect or strange main module includes. I have manually inspected all of these, and fixed the main module include to be the nearest plausible thing I could find. If you own or care about any of these source files, I encourage you to take some time and check that these edits were sensible. I can't have broken anything (I strictly added headers, and reordered them, never removed), but they may not be the headers you'd really like to identify as containing the API being implemented. Many forward declarations and missing includes were added to a header files to allow them to parse cleanly when included first. The main module rule does in fact have its merits. =] llvm-svn: 169131
OpenPOWER on IntegriCloud