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path: root/llvm/lib/Target/X86/X86FixupLEAs.cpp
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* Use StringRef in Pass/PassManager APIs (NFC)Mehdi Amini2016-10-011-1/+1
| | | | llvm-svn: 283004
* MachineFunctionProperties/MIRParser: Rename AllVRegsAllocated->NoVRegs, ↵Matthias Braun2016-08-251-1/+1
| | | | | | | | | | | | | compute it Rename AllVRegsAllocated to NoVRegs. This avoids the connotation of running after register and simply describes that no vregs are used in a machine function. With that we can simply compute the property and do not need to dump/parse it in .mir files. Differential Revision: http://reviews.llvm.org/D23850 llvm-svn: 279698
* X86: Avoid implicit iterator conversions, NFCDuncan P. N. Exon Smith2016-07-121-38/+38
| | | | | | | | Avoid implicit conversions from MachineInstrBundleIterator to MachineInstr*, mainly by preferring MachineInstr& over MachineInstr* and using range-based for loops. llvm-svn: 275149
* CodeGen: Use MachineInstr& in TargetInstrInfo, NFCDuncan P. N. Exon Smith2016-06-301-18/+18
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This is mostly a mechanical change to make TargetInstrInfo API take MachineInstr& (instead of MachineInstr* or MachineBasicBlock::iterator) when the argument is expected to be a valid MachineInstr. This is a general API improvement. Although it would be possible to do this one function at a time, that would demand a quadratic amount of churn since many of these functions call each other. Instead I've done everything as a block and just updated what was necessary. This is mostly mechanical fixes: adding and removing `*` and `&` operators. The only non-mechanical change is to split ARMBaseInstrInfo::getOperandLatencyImpl out from ARMBaseInstrInfo::getOperandLatency. Previously, the latter took a `MachineInstr*` which it updated to the instruction bundle leader; now, the latter calls the former either with the same `MachineInstr&` or the bundle leader. As a side effect, this removes a bunch of MachineInstr* to MachineBasicBlock::iterator implicit conversions, a necessary step toward fixing PR26753. Note: I updated WebAssembly, Lanai, and AVR (despite being off-by-default) since it turned out to be easy. I couldn't run tests for AVR since llc doesn't link with it turned on. llvm-svn: 274189
* [X86] Remove unused operand from a function and all its callers. NFCCraig Topper2016-04-281-2/+1
| | | | llvm-svn: 267854
* Optimization bisect support in X86-specific passesAndrew Kaylor2016-04-261-0/+3
| | | | | | Differential Revision: http://reviews.llvm.org/D19439 llvm-svn: 267608
* Add MachineFunctionProperty checks for AllVRegsAllocated for target passesDerek Schuff2016-04-041-0/+6
| | | | | | | | | | | | | | Summary: This adds the same checks that were added in r264593 to all target-specific passes that run after register allocation. Reviewers: qcolombet Subscribers: jyknight, dsanders, llvm-commits Differential Revision: http://reviews.llvm.org/D18525 llvm-svn: 265313
* [X86] Replace LEAs with INC/DEC when profitableMichael Kuperstein2015-11-111-8/+79
| | | | | | | | | If possible and profitable, replace lea %reg, 1(%reg) and lea %reg, -1(%reg) with inc %reg and dec %reg respectively. Patch by: anton.nadolsky@intel.com Differential Revision: http://reviews.llvm.org/D14059 llvm-svn: 252722
* X86: Remove implicit ilist iterator conversions, NFCDuncan P. N. Exon Smith2015-10-191-1/+1
| | | | llvm-svn: 250741
* Revert r240137 (Fixed/added namespace ending comments using clang-tidy. NFC)Alexander Kornienko2015-06-231-1/+1
| | | | | | Apparently, the style needs to be agreed upon first. llvm-svn: 240390
* Fixed/added namespace ending comments using clang-tidy. NFCAlexander Kornienko2015-06-191-1/+1
| | | | | | | | | | | | | The patch is generated using this command: tools/clang/tools/extra/clang-tidy/tool/run-clang-tidy.py -fix \ -checks=-*,llvm-namespace-comment -header-filter='llvm/.*|clang/.*' \ llvm/lib/ Thanks to Eugene Kosov for the original patch! llvm-svn: 240137
* Fix "the the" in comments.Eric Christopher2015-06-191-1/+1
| | | | llvm-svn: 240112
* Use the cached subtarget from the MachineFunction rather thanEric Christopher2015-02-201-4/+2
| | | | | | doing a lookup on the TargetMachine. llvm-svn: 229995
* Use cached subtargets inside X86FixupLEAs.Eric Christopher2015-02-051-3/+2
| | | | llvm-svn: 228333
* Replace several 'assert(false' with 'llvm_unreachable' or fold a condition ↵Craig Topper2015-01-051-2/+1
| | | | | | into the assert. llvm-svn: 225160
* Remove the TargetMachine forwards for TargetSubtargetInfo basedEric Christopher2014-08-041-2/+4
| | | | | | information and update all callers. No functional change. llvm-svn: 214781
* Remove Atom references in description.Sanjay Patel2014-07-161-4/+3
| | | | | | Any CPU can run this pass. llvm-svn: 213190
* [C++11] Use 'nullptr'.Craig Topper2014-06-081-1/+1
| | | | llvm-svn: 210442
* Revert r209381 as it isn't a local variable. Add a testcase so thatEric Christopher2014-06-031-0/+1
| | | | | | we know next time this happens. llvm-svn: 210127
* Fixup formatting in the pass.Eric Christopher2014-06-031-86/+86
| | | | llvm-svn: 210126
* Avoid using subtarget features when adding X86 specific passes toEric Christopher2014-05-221-0/+4
| | | | | | the pass pipeline. llvm-svn: 209382
* Remove extra local variable.Eric Christopher2014-05-221-2/+1
| | | | llvm-svn: 209381
* [X86] Tune LEA usage for SilvermontAlexey Volkov2014-05-201-7/+82
| | | | | | | | | | | | | According to Intel Software Optimization Manual on Silvermont in some cases LEA is better to be replaced with ADD instructions: "The rule of thumb for ADDs and LEAs is that it is justified to use LEA with a valid index and/or displacement for non-destructive destination purposes (especially useful for stack offset cases), or to use a SCALE. Otherwise, ADD(s) are preferable." Differential Revision: http://reviews.llvm.org/D3826 llvm-svn: 209198
* [C++] Use 'nullptr'. Target edition.Craig Topper2014-04-251-4/+4
| | | | llvm-svn: 207197
* [Modules] Fix potential ODR violations by sinking the DEBUG_TYPEChandler Carruth2014-04-221-1/+2
| | | | | | | definition below all of the header #include lines, lib/Target/... edition. llvm-svn: 206842
* [C++11] Add 'override' keyword to virtual methods that override their base ↵Craig Topper2014-03-091-2/+2
| | | | | | class. llvm-svn: 203378
* Forgot to add a break statement.Preston Gurd2013-09-301-0/+1
| | | | llvm-svn: 191715
* The X86FixupLEAs pass for Intel Atom must not call convertToThreeAddressPreston Gurd2013-09-301-0/+8
| | | | | | | | | | | on ADD16rr opcodes, if src1 != src, since that would cause convertToThreeAddress to try to create a virtual register. This is not permitted after register allocation, which is when the X86FixupLEAs pass runs. This patch fixes PR16785. llvm-svn: 191711
* Don't cache the instruction and register info from the TargetMachine, becauseBill Wendling2013-06-071-1/+1
| | | | | | | | the internals of TargetMachine could change. No functionality change intended. llvm-svn: 183571
* Make function documentation conform to llvm standards.Preston Gurd2013-04-251-30/+32
| | | | | | Expunge all remaining traces and use of live variable information. llvm-svn: 180577
* This patch adds the X86FixupLEAs pass, which will reduce instructionPreston Gurd2013-04-251-0/+251
latency for certain models of the Intel Atom family, by converting instructions into their equivalent LEA instructions, when it is both useful and possible to do so. llvm-svn: 180573
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