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* Target/X86/X86FastISel: [PR6275] Fix Win32's dllimport function with fastisel.NAKAMURA Takumi2011-02-211-2/+6
| | | | | | | "dllimport" function must not be GlobalVariable, but Function. It is enough to check with GlobalValue. test/CodeGen/X86/dll-linkage.ll is updated to check llc -O0. llvm-svn: 126110
* reapply my fix for PR8961 with a tweak to properly handleChris Lattner2011-01-161-1/+1
| | | | | | | multi-instruction sequences like calls. Many thanks to Jakob for finding a testcase. llvm-svn: 123559
* revert my fastisel patch again which apparently still gives theChris Lattner2011-01-141-1/+1
| | | | | | llvm-gcc-i386-linux-selfhost buildbot heartburn... llvm-svn: 123431
* reapply r123414 now that the botz are calmed down and the fix is already in.Chris Lattner2011-01-141-1/+1
| | | | llvm-svn: 123427
* r123414 broke llvm-gcc bootstrap apparently, revertChris Lattner2011-01-141-1/+1
| | | | llvm-svn: 123422
* fix PR8961 - a fast isel miscompilation where we'd insert a new instructionChris Lattner2011-01-141-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | after sext's generated for addressing that got folded. Previously we compiled test5 into: _test5: ## @test5 ## BB#0: movq -8(%rsp), %rax ## 8-byte Reload movq (%rdi,%rax), %rdi addq %rdx, %rdi movslq %esi, %rax movq %rax, -8(%rsp) ## 8-byte Spill movq %rdi, %rax ret which is insane and wrong. Now we produce: _test5: ## @test5 ## BB#0: movslq %esi, %rax movq (%rdi,%rax), %rax addq %rdx, %rax ret llvm-svn: 123414
* Do not model all INLINEASM instructions as having unmodelled side effects.Evan Cheng2011-01-071-2/+2
| | | | | | | | | | Instead encode llvm IR level property "HasSideEffects" in an operand (shared with IsAlignStack). Added MachineInstrs::hasUnmodeledSideEffects() to check the operand when the instruction is an INLINEASM. This allows memory instructions to be moved around INLINEASM instructions. llvm-svn: 123044
* Remove dead code and silence warnings.Benjamin Kramer2011-01-061-2/+0
| | | | llvm-svn: 122957
* silence more self assignment warnings.Chris Lattner2011-01-051-3/+3
| | | | llvm-svn: 122920
* Renaming ISD::BIT_CONVERT to ISD::BITCAST to better reflect the LLVM IR concept.Wesley Peck2010-11-231-76/+76
| | | | llvm-svn: 119990
* Reapply r118917. With pseudo-instruction expansion moved toDan Gohman2010-11-161-5/+5
| | | | | | | a different pass, the complicated interaction between cmov expansion and fast isel is no longer a concern. llvm-svn: 119400
* Revert r118917, which is implicated in the llvm-gcc-i386-linux-selfhost failure.Dan Gohman2010-11-131-5/+5
| | | | llvm-svn: 118954
* When the definition of an address value is in a different blockDan Gohman2010-11-121-5/+5
| | | | | | | | from the user of the address, fall back to just using the address in a register instead of bailing out of fast-isel altogether. llvm-svn: 118917
* In the calling convention logic, ValVT is always a legal type,Duncan Sands2010-11-041-1/+1
| | | | | | | and as such can be represented by an MVT - the more complicated EVT is not needed. Use MVT for ValVT everywhere. llvm-svn: 118245
* Inside the calling convention logic LocVT is always a simpleDuncan Sands2010-11-031-24/+25
| | | | | | | | | | value type, so there is no point in passing it around using an EVT. Use the simpler MVT everywhere. Rather than trying to propagate this information maximally in all the code that using the calling convention stuff, I chose to do a mainly low impact change instead. llvm-svn: 118167
* Factorize the duplicated logic for choosing the right argumentDuncan Sands2010-10-311-28/+1
| | | | | | | calling convention out of the fast and normal ISel files, and into the calling convention TD file. llvm-svn: 117856
* Remove CCAssignFnForRet from X86 FastISel in favour of RetCC_X86,Duncan Sands2010-10-311-16/+1
| | | | | | | which has the same logic specified in the CallingConv TD file. This brings FastISel in line with the standard X86 ISel. llvm-svn: 117855
* Noticed by inspection when looking for other cmov bits.Eric Christopher2010-09-291-0/+3
| | | | llvm-svn: 115100
* MMX parameters aren't handled here yet.Dale Johannesen2010-09-271-0/+3
| | | | llvm-svn: 114844
* implement rdar://6653118 - fastisel should fold loads where possible.Chris Lattner2010-09-051-0/+35
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Since mem2reg isn't run at -O0, we get a ton of reloads from the stack, for example, before, this code: int foo(int x, int y, int z) { return x+y+z; } used to compile into: _foo: ## @foo subq $12, %rsp movl %edi, 8(%rsp) movl %esi, 4(%rsp) movl %edx, (%rsp) movl 8(%rsp), %edx movl 4(%rsp), %esi addl %edx, %esi movl (%rsp), %edx addl %esi, %edx movl %edx, %eax addq $12, %rsp ret Now we produce: _foo: ## @foo subq $12, %rsp movl %edi, 8(%rsp) movl %esi, 4(%rsp) movl %edx, (%rsp) movl 8(%rsp), %edx addl 4(%rsp), %edx ## Folded load addl (%rsp), %edx ## Folded load movl %edx, %eax addq $12, %rsp ret Fewer instructions and less register use = faster compiles. llvm-svn: 113102
* Fix x86 fast-isel's cmp+branch folding to avoid folding when theDan Gohman2010-08-211-2/+4
| | | | | | | | comparison is in a different basic block from the branch. In such cases, the comparison's operands may not have initialized virtual registers available. llvm-svn: 111709
* Make fast isel win64-aware w.r.t. call-clobbered regsNate Begeman2010-07-221-3/+14
| | | | llvm-svn: 109069
* Use MI.isCopy.Jakob Stoklund Olesen2010-07-161-4/+2
| | | | llvm-svn: 108565
* Last COPY conversion.Jakob Stoklund Olesen2010-07-141-3/+2
| | | | llvm-svn: 108387
* Don't propagate debug locations to instructions for materializingDan Gohman2010-07-141-1/+1
| | | | | | | constants, since they may not be emited near the other instructions which get the same line, and this confuses debug info. llvm-svn: 108302
* Don't fast-isel an x87 comparison opcode, as fast-isel doesn'tDan Gohman2010-07-121-2/+2
| | | | | | support branching on x87 comparisons yet. This fixes PR7624. llvm-svn: 108149
* Avoid SSE instructions in FastIsel when it is not available.Jakob Stoklund Olesen2010-07-111-4/+4
| | | | llvm-svn: 108091
* Use COPY in X86FastISel::X86SelectRet.Jakob Stoklund Olesen2010-07-111-6/+4
| | | | | | | Don't try a cross-class copy. That is very unlikely anywy since return value registers are usually register class friendly. (%EAX, %XMM0, etc). llvm-svn: 108074
* Use COPY in FastISel everywhere it is safe and trivial.Jakob Stoklund Olesen2010-07-111-18/+8
| | | | | | | The remaining copyRegToReg calls actually check the return value (shock!), so we cannot trivially replace them with COPY instructions. llvm-svn: 108069
* Reapply bottom-up fast-isel, with several fixes for x86-32:Dan Gohman2010-07-101-60/+218
| | | | | | | | | - Check getBytesToPopOnReturn(). - Eschew ST0 and ST1 for return values. - Fix the PIC base register initialization so that it doesn't ever fail to end up the top of the entry block. llvm-svn: 108039
* --- Reverse-merging r107947 into '.':Bob Wilson2010-07-091-199/+60
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | U utils/TableGen/FastISelEmitter.cpp --- Reverse-merging r107943 into '.': U test/CodeGen/X86/fast-isel.ll U test/CodeGen/X86/fast-isel-loads.ll U include/llvm/Target/TargetLowering.h U include/llvm/Support/PassNameParser.h U include/llvm/CodeGen/FunctionLoweringInfo.h U include/llvm/CodeGen/CallingConvLower.h U include/llvm/CodeGen/FastISel.h U include/llvm/CodeGen/SelectionDAGISel.h U lib/CodeGen/LLVMTargetMachine.cpp U lib/CodeGen/CallingConvLower.cpp U lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp U lib/CodeGen/SelectionDAG/FunctionLoweringInfo.cpp U lib/CodeGen/SelectionDAG/FastISel.cpp U lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp U lib/CodeGen/SelectionDAG/ScheduleDAGSDNodes.cpp U lib/CodeGen/SelectionDAG/InstrEmitter.cpp U lib/CodeGen/SelectionDAG/TargetLowering.cpp U lib/Target/XCore/XCoreISelLowering.cpp U lib/Target/XCore/XCoreISelLowering.h U lib/Target/X86/X86ISelLowering.cpp U lib/Target/X86/X86FastISel.cpp U lib/Target/X86/X86ISelLowering.h llvm-svn: 107987
* Re-apply bottom-up fast-isel, with fixes. Be very careful to avoid emittingDan Gohman2010-07-091-60/+199
| | | | | | a DBG_VALUE after a terminator, or emitting any instructions before an EH_LABEL. llvm-svn: 107943
* Change LEA to have 5 operands for its memory operand, justChris Lattner2010-07-081-2/+2
| | | | | | | | | | | like all other instructions, even though a segment is not allowed. This resolves a bunch of gross hacks in the encoder and makes LEA more consistent with the rest of the instruction set. No functionality change. llvm-svn: 107934
* Convert EXTRACT_SUBREG to COPY when emitting machine instrs.Jakob Stoklund Olesen2010-07-081-4/+3
| | | | | | | | | EXTRACT_SUBREG no longer appears as a machine instruction. Use COPY instead. Add isCopy() checks in many places using isMoveInstr() and isExtractSubreg(). The isMoveInstr hook will be removed later. llvm-svn: 107879
* Revert 107840 107839 107813 107804 107800 107797 107791.Dan Gohman2010-07-081-187/+59
| | | | | | Debug info intrinsics win for now. llvm-svn: 107850
* Implement bottom-up fast-isel. This has the advantage of not requiringDan Gohman2010-07-071-22/+42
| | | | | | a separate DCE pass over MachineInstrs. llvm-svn: 107804
* Add X86FastISel support for return statements. This entails refactoringDan Gohman2010-07-071-2/+72
| | | | | | | a bunch of stuff, to allow the target-independent calling convention logic to be employed. llvm-svn: 107800
* Give FunctionLoweringInfo an MBB member, avoiding the need to pass itDan Gohman2010-07-071-57/+95
| | | | | | | | around everywhere, and also give it an InsertPt member, to enable isel to operate at an arbitrary position within a block, rather than just appending to a block. llvm-svn: 107791
* Simplify FastISel's constructor by giving it a FunctionLoweringInfoDan Gohman2010-07-071-38/+15
| | | | | | | | | instance, rather than pointers to all of FunctionLoweringInfo's members. This eliminates an NDEBUG ABI sensitivity. llvm-svn: 107789
* Enable on-demand fast-isel.Dan Gohman2010-07-011-1/+1
| | | | llvm-svn: 107377
* Fix X86FastISel's add folding to actually work, and not fall backDan Gohman2010-07-011-4/+8
| | | | | | to SelectionDAG. llvm-svn: 107376
* Teach X86FastISel to fold constant offsets and scaled indices inDan Gohman2010-07-011-14/+23
| | | | | | the same address. llvm-svn: 107373
* use ArgOperand APIGabor Greif2010-06-261-6/+6
| | | | llvm-svn: 106944
* Teach regular and fast isel to set dead flags on unused implicit defsDan Gohman2010-06-181-0/+6
| | | | | | on calls and similar instructions. llvm-svn: 106353
* Make this comment less specific.Dan Gohman2010-06-181-1/+2
| | | | llvm-svn: 106311
* Fix X86FastISel's address-mode folding to stay within theDan Gohman2010-06-181-0/+6
| | | | | | | | original basic block. This avoids trouble with examining instructions in other basic blocks which haven't been assigned registers yet. llvm-svn: 106310
* Eliminate unnecessary uses of getZExtValue().Dan Gohman2010-06-181-1/+1
| | | | llvm-svn: 106279
* Add a DebugLoc parameter to TargetInstrInfo::InsertBranch(). ThisStuart Hastings2010-06-171-3/+3
| | | | | | | | | | | | addresses a longstanding deficiency noted in many FIXMEs scattered across all the targets. This effectively moves the problem up one level, replacing eleven FIXMEs in the targets with eight FIXMEs in CodeGen, plus one path through FastISel where we actually supply a DebugLoc, fixing Radar 7421831. llvm-svn: 106243
* fix fastisel to handle GS and FS relative pointers. Patch byChris Lattner2010-06-151-0/+5
| | | | | | Nelson Elhage! llvm-svn: 106031
* Fix the allocation of shadow space for the Win64 calling conventionDan Gohman2010-06-011-0/+6
| | | | | | in X86FastISel. Patch by Jan Sjodin. llvm-svn: 105290
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